In-depth analysis, performance audits, and news for the RISC-V and Linux ecosystem.
AI Analysis Abstract Modern AI and High-Performance Computing (HPC) systems face a rapidly expanding and complex design space, encompassing diverse compute architectures like GPUs, dataflow processors, and RISC-V accelerators, various memory technologies, and multiple…
AI Analysis Abstract Firmware diagnostic logging (printf) significantly burdens cycle-accurate RTL simulation, consuming 3.04 to 15.23 microseconds per call due to on-core formatting and memory-mapped I/O (MMIO) bus stalls. This paper introduces a host-side in-simulation…
AI Analysis Abstract SoCMake, a component of the System-on-Chip Radiation-Tolerant Ecosystem (SOCRATES), is being developed to produce modular RISC-V SoCs for radiation-harsh and safety-critical environments. This work explores the early adoption of programmable SoCs in ASIC…
AI Analysis Abstract This paper addresses the suboptimal performance of FlashAttention on long-vector RISC-V processors, specifically the EPAC chip, where the PyTorch CPU kernel achieves only 16.2% of peak floating-point utilization. The inefficiencies stem from misaligned…
AI Analysis Abstract The LILYGO T-Display K230 is a handheld development kit built around the Canaan Kendryte K230 dual-core 64-bit RISC-V processor, which includes an integrated AI accelerator. It features a 4.1-inch AMOLED touchscreen, 1GB LPDDR4 RAM, a 2MP camera, and…
AI Analysis Abstract Two independent open-source projects, Ziro Designer/ZiroEDA and KiCad Android, now enable KiCad 10 to run unofficially in a web browser or as a native Android application. These developments expand KiCad's accessibility to platforms like RISC-V, Android…
AI Analysis Abstract LabWired is an MIT-licensed MCU firmware simulation core designed to accelerate firmware testing. It executes compiled firmware against simulated CPUs and peripherals, capturing output and register states, and supports repeatable checks in Continuous…
AI Analysis Abstract This work demonstrates real-time, open-vocabulary streaming speech recognition on a microcontroller using Kroko, a 65.7M-parameter Zipformer2 transducer. The system runs on an ESP32-P4, which features dual 400 MHz RISC-V cores and a 128-bit SIMD extension…
AI Analysis Abstract This work introduces a development environment that integrates LLM agents with FPGA-in-the-loop evaluation for designing RISC-V CPUs. The system allows LLM agents to implement CPU candidates on an FPGA and utilize on-board performance measurements to guide…
A quick read through more news, research, and practical guides.
AI Analysis Abstract Modern AI and High-Performance Computing (HPC) systems face a rapidly expanding and complex design space, encompassing diverse compute architectures like GPUs, dataflow processors, and RISC-V accelerators, various memory technologies, and multiple…
AI Analysis Abstract Firmware diagnostic logging (printf) significantly burdens cycle-accurate RTL simulation, consuming 3.04 to 15.23 microseconds per call due to on-core formatting and memory-mapped I/O (MMIO) bus stalls. This paper introduces a host-side in-simulation…
AI Analysis Abstract SoCMake, a component of the System-on-Chip Radiation-Tolerant Ecosystem (SOCRATES), is being developed to produce modular RISC-V SoCs for radiation-harsh and safety-critical environments. This work explores the early adoption of programmable SoCs in ASIC…
AI Analysis Abstract This paper addresses the suboptimal performance of FlashAttention on long-vector RISC-V processors, specifically the EPAC chip, where the PyTorch CPU kernel achieves only 16.2% of peak floating-point utilization. The inefficiencies stem from misaligned…
AI Analysis Abstract The LILYGO T-Display K230 is a handheld development kit built around the Canaan Kendryte K230 dual-core 64-bit RISC-V processor, which includes an integrated AI accelerator. It features a 4.1-inch AMOLED touchscreen, 1GB LPDDR4 RAM, a 2MP camera, and…
AI Analysis Abstract Two independent open-source projects, Ziro Designer/ZiroEDA and KiCad Android, now enable KiCad 10 to run unofficially in a web browser or as a native Android application. These developments expand KiCad's accessibility to platforms like RISC-V, Android…
AI Analysis Abstract LabWired is an MIT-licensed MCU firmware simulation core designed to accelerate firmware testing. It executes compiled firmware against simulated CPUs and peripherals, capturing output and register states, and supports repeatable checks in Continuous…
AI Analysis Abstract This work demonstrates real-time, open-vocabulary streaming speech recognition on a microcontroller using Kroko, a 65.7M-parameter Zipformer2 transducer. The system runs on an ESP32-P4, which features dual 400 MHz RISC-V cores and a 128-bit SIMD extension…
AI Analysis Abstract This work introduces a development environment that integrates LLM agents with FPGA-in-the-loop evaluation for designing RISC-V CPUs. The system allows LLM agents to implement CPU candidates on an FPGA and utilize on-board performance measurements to guide…
AI Analysis Abstract RV2GC is a system designed for programmable garbled-circuit execution in a RISC-V processor, addressing the inefficiencies of traditional complete garbled processors that repeatedly traverse large, fixed circuits. It reconstructs the garbling boundary by…
AI Analysis Abstract This paper presents the first comprehensive hardware study of four state-of-the-art randomized cache designs—Ceaser-S, ScatterCache, SassCache, and Mirage—integrated into the last-level cache of a multi-core out-of-order RISC-V System-on-Chip. The research…
AI Analysis Abstract This letter details a mixed-precision CNN-LSTM accelerator designed for EEG-based sleep staging. It incorporates a serpentine dataflow to efficiently process long temporal convolutions, significantly reducing memory accesses compared to conventional methods.…
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