Proceedings of the 15th ACM SIGPLAN International Conference on Certified Programs and Proofs

Abstract The Proceedings of the 15th ACM SIGPLAN CPP '26 compile cutting-edge research focused on the intersection of formal verification and practical program development. This conference showcases innovations in using proof assistants,

By Admin 10 Jan 2026 • 2 min read •

Proceedings of the 12th International Conference on Next Generation Computing, Communication, Systems and Security

Abstract The Proceedings of the 12th International Conference on Next Generation Computing, Communication, Systems and Security (NSysS '25) compiles cutting-edge research focused on the convergence of advanced digital technologies. This volume addresses

By Admin 10 Jan 2026 • 2 min read •

Proceedings of the 37th Australian Conference on Human-Computer Interaction

Abstract The Proceedings of the 37th Australian Conference on Human-Computer Interaction (OzCHI '25) collects pivotal research focused on advancing user experience, interface design, and interaction methodologies for emerging technologies. Key themes include

By Admin 10 Jan 2026 • 2 min read •

Linux Patches Enable Intel GPU Firmware Updating From Non-x86 Systems

Abstract New Linux patches are enabling Intel discrete GPU firmware updates on non-x86 architectures, such as ARM and RISC-V. Previously, this functionality was restricted because the Intel Management Engine Interface (MEI) driver was

By Admin 8 Jan 2026 • 1 min read •

MUSE Book laptop review – Testing an octa-core RISC-V Linux laptop in 2026 - CNX Software

Abstract The article provides a review of the MUSE Book, an octa-core RISC-V laptop running Linux, focusing on its performance and viability in the projected 2026 computing landscape. This testing marks a significant

By Admin 8 Jan 2026 • 2 min read •

MUSE Book laptop review – Testing an octa-core RISC-V Linux laptop in 2026

Abstract The MUSE Book RISC-V laptop, featuring the SpacemiT K1/M1 octa-core SoC, demonstrates the maturation of the RISC-V hardware ecosystem into a consumer form factor. The 2026 review specifically prioritizes evaluating software

By Admin 8 Jan 2026 • 1 min read •

Nice to Meet You: Synthesizing Practical MLIR Abstract Transformers

Abstract This work introduces a novel approach for synthesizing practical Abstract Transformers tailored for the MLIR compiler infrastructure. By automating the generation of these crucial components, the system significantly reduces the manual engineering

By Admin 8 Jan 2026 • 2 min read •

ChiSA: Static Analysis for Lightweight Chisel Verification

Abstract ChiSA introduces a novel static analysis framework specifically designed for lightweight verification of hardware designs written in the Chisel HDL. This approach allows developers to detect common design errors, structural inconsistencies, and

By Admin 8 Jan 2026 • 2 min read •

ArchSem: Reusable Rigorous Semantics of Relaxed Architectures

Abstract ArchSem introduces a novel, reusable framework for defining the rigorous semantics of complex relaxed computer architectures. This approach allows developers and verification engineers to formally specify weak memory models (WMMs) in a

By Admin 8 Jan 2026 • 2 min read •

Foundational Verification of Running-Time Bounds for Interactive Programs

Abstract This article introduces a novel methodology for the foundational verification of running-time bounds, specifically addressing the complexities of interactive programs. It establishes a formal framework capable of mathematically certifying Worst-Case Execution Time

By Admin 8 Jan 2026 • 2 min read •

RISC-V's rise: A third CPU ecosystem in 5-10 years? - digitimes

Abstract The Digitimes article assesses the rapid expansion of the RISC-V Instruction Set Architecture (ISA) in the global semiconductor market. It hypothesizes that, based on current industry trends and accelerated adoption, RISC-V is

By Admin 7 Jan 2026 • 2 min read •

RISC-V’s AI Revolution: SiFive’s 2nd Gen Intelligence Cores Set to Topple the ARM/x86 Duopoly - FinancialContent

Abstract SiFive has introduced its 2nd Generation Intelligence Cores, significantly accelerating the RISC-V movement into the high-performance computing and AI processing markets. These advanced cores are specifically designed to handle intense machine learning

By Admin 7 Jan 2026 • 2 min read •

News

Meta and Qualcomm push RISC-V market share towards 25% ... - eeNews Europe

Abstract Major technology leaders Meta and Qualcomm are aggressively integrating RISC-V into their semiconductor strategies, validating the open-source instruction set architecture (ISA). This strategic push is projected to propel RISC-V's market

By Admin 7 Jan 2026 • 2 min read •

RISC-V

RISC-V Hits 25% Market Share: The Rise of Open-Source Silicon Sovereignty

Abstract The RISC-V instruction set architecture (ISA) has achieved a significant milestone, claiming roughly 25% of the global processor market share. This rapid adoption is driven by its open, modular architecture, enabling broad

By Admin 7 Jan 2026 • 1 min read •

News

RISC-V hits 25% market penetration thanks to Meta and Qualcomm - Adafruit

Abstract The RISC-V open-source architecture has achieved a significant milestone, reaching 25% market penetration in relevant sectors. This substantial growth is primarily driven by massive adoption and investment from major industry players, specifically

By Admin 7 Jan 2026 • 1 min read •

News

Andrew “bunnie” Huang designs a “mostly open” RISC-V board - Adafruit

Abstract Andrew “bunnie” Huang has designed a new RISC-V development board characterized by its commitment to a “mostly open” hardware philosophy. This project leverages the royalty-free RISC-V architecture to create a transparent, developer-friendly

By Admin 7 Jan 2026 • 1 min read •

News

The RISC-V Revolution: Qualcomm’s Acquisition of Ventana Micro Systems Signals the End of the ARM-x86 Duopoly - FinancialContent

Abstract Qualcomm’s acquisition of Ventana Micro Systems marks a pivotal moment, validating the RISC-V architecture's readiness to compete in high-performance computing markets traditionally dominated by ARM and x86. Ventana specializes

By Admin 7 Jan 2026 • 2 min read •

News

U.S. must guard NASA’s future as China eyes space dominance | Opinion - Florida Today

Abstract This opinion piece highlights the escalating geopolitical rivalry between the United States (NASA) and China for supremacy in space exploration, warning that China is aggressively pursuing space dominance. The article argues that

By Admin 7 Jan 2026 • 2 min read •

Embedded

Nordic Semi nRF54LM20B wireless SoC integrates 128 MHz Axon NPU for Edge AI workloads

Abstract Nordic Semiconductor has introduced the nRF54LM20B wireless SoC, the first nRF54L microcontroller to integrate a dedicated 128 MHz Axon Neural Processing Unit (NPU) for high-efficiency edge AI tasks. This NPU delivers substantial

By Admin 7 Jan 2026 • 2 min read •

Embedded

Espressif Systems showcases ESP32-E22 Wi-Fi 6E SoC and ESP32-H21 BLE MCU for battery-powered devices

Abstract Espressif Systems showcased two new RISC-V microcontrollers at CES 2026: the high-performance ESP32-E22 Wi-Fi 6E SoC and the ultra-low-power ESP32-H21 Bluetooth LE MCU. The ESP32-E22 features a dual-core 500 MHz RISC-V CPU

By Admin 7 Jan 2026 • 2 min read •

Embedded

Openterface KVM-GO – An ultra-compact KVM-over-USB solution with HDMI, DP, or VGA video input

Abstract The Openterface KVM-GO is an ultra-compact, open-source KVM-over-USB solution designed for troubleshooting headless devices and remote server monitoring. This keychain-sized gadget, powered by a WCH CH32V208 RISC-V MCU, features interchangeable models supporting

By Admin 5 Jan 2026 • 2 min read •

News

Allwinner V861 dual-core 64-bit RISC-V AI Camera SiP features 128MB DDR3L, 4K H.265/H.264 video encoder - CNX Software

Abstract Allwinner has introduced the V861, a new dual-core 64-bit RISC-V System-in-Package (SiP) specifically designed for advanced AI camera applications. This chip integrates 128MB of DDR3L memory directly, significantly simplifying hardware design and

By Admin 4 Jan 2026 • 1 min read •

Embedded

Allwinner V861 dual-core 64-bit RISC-V AI Camera SiP features 128MB DDR3L, 4K H.265/H.264 video encoder

Abstract The Allwinner V861 is a new dual-core 64-bit RISC-V SiP optimized for 4K AI camera applications, notably integrating 128MB DDR3L and a 1 TOPS NPU. It utilizes XuanTie C907 and E907 cores,

By Admin 4 Jan 2026 • 2 min read •

News

WCH CH32H417 dual-core RISC-V MCU offers USB 3.0, 500MB/s UHSIF, and Fast Ethernet interfaces - CNX Software

Abstract WCH has announced the CH32H417, a new dual-core RISC-V MCU designed for high-speed data handling in embedded systems. The key innovation is the integration of advanced connectivity features, including native USB 3.

By Admin 3 Jan 2026 • 1 min read •