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Linux Patches Enable Intel GPU Firmware Updating From Non-x86 Systems
Abstract
New Linux patches are enabling Intel discrete GPU firmware updates on non-x86 architectures, such as ARM and RISC-V. Previously, this functionality was restricted because the Intel Management Engine Interface (MEI)
Linux
Qualcomm's Xqci RISC-V Extension Now Deemed Non-Experimental For LLVM 22
Abstract
Qualcomm's proprietary Xqci RISC-V vendor extension has officially transitioned from experimental status to stable within the LLVM compiler toolchain. This critical change was recently committed to the LLVM Git
Research
TeraPool: A Physical Design Aware, 1024 RISC-V Cores Shared-L1-Memory Scaled-Up Cluster Design With High Bandwidth Main Memory Link
Abstract
The TeraPool project introduces a highly scaled-up cluster architecture integrating 1024 RISC-V cores optimized for parallelism. Its key innovation is a physically design-aware implementation featuring a shared-L1-memory
Research
XiangShan: An Open Source Project for High-Performance RISC-V Processors Meeting Industrial-Grade Standards
Abstract
The XiangShan project introduces a major open-source initiative dedicated to building high-performance RISC-V processors. Crucially, the design targets industrial-grade standards, ensuring the necessary reliability and robustness for commercial