RISC-V

Research

Implementing Cryptographic Algorithms for the RISC-V Instruction Set Architecture in Two Cases - Semiconductor Engineering

Abstract The analyzed work details the successful implementation and evaluation of core cryptographic algorithms tailored for the RISC-V Instruction Set Architecture. The research specifically contrasts performance and complexity across 'Two Cases,'

By Admin 18 Aug 2022 • 2 min read •

Research

SiFive Is Leading The Way For Innovation On RISC-V - Forbes (Full Report)

By Admin 8 Aug 2022 •

Research

SiFive Is Leading The Way For Innovation On RISC-V - Forbes

Abstract The article highlights SiFive's pivotal role in spearheading innovation within the RISC-V ecosystem, transforming the open instruction set architecture into a commercially viable, high-performance solution. SiFive is driving RISC-V adoption

By Admin 8 Aug 2022 • 2 min read •

🔒 Members

Research

RTL to GDS-II flow Archives - Semiconductor Engineering (Full Report)

By Admin 21 Jul 2022 •

Research

RTL to GDS-II flow Archives - Semiconductor Engineering

Abstract The featured archive extensively covers the complete semiconductor physical design pipeline, detailing the critical conversion process from Register-Transfer Level (RTL) descriptions to the final manufacturing data format, GDS-II. It explores the methodologies

By Admin 21 Jul 2022 • 2 min read •

Research

RISC-V AI Chips Will Be Everywhere - IEEE Spectrum (Full Report)

By Admin 24 Feb 2022 •

Research

RISC-V AI Chips Will Be Everywhere - IEEE Spectrum

Abstract RISC-V architecture is rapidly emerging as the foundation for next-generation AI accelerators, promising ubiquity across diverse computing domains. This proliferation is driven by RISC-V's intrinsic flexibility, allowing developers to implement

By Admin 24 Feb 2022 • 2 min read •

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Research

Do You Know For Sure Your RISC-V RTL Doesn’t Contain Any Surprises? - Semiconductor Engineering (Full Report)

By Admin 3 Feb 2022 •

Research

Do You Know For Sure Your RISC-V RTL Doesn’t Contain Any Surprises? - Semiconductor Engineering

Abstract The article critically examines the challenges associated with rigorous verification and validation of RISC-V Register Transfer Level (RTL) designs. It highlights the potential for hidden bugs, security vulnerabilities, or unintended features—termed

By Admin 3 Feb 2022 • 2 min read •

Research

Nvidia CUDA software ported to open source RISC-V GPGPU project #RISCV #CUDA @TomsHardware - Adafruit (Full Report)

By Admin 8 Sep 2021 •

Research

Nvidia CUDA software ported to open source RISC-V GPGPU project #RISCV #CUDA @TomsHardware - Adafruit

Abstract Nvidia's proprietary CUDA parallel computing platform has been successfully ported to an open-source RISC-V General-Purpose GPU (GPGPU) project. This achievement addresses a critical software compatibility barrier, allowing code developed for

By Admin 8 Sep 2021 • 2 min read •

Research

Is RISC-V The Future? - Semiconductor Engineering (Full Report)

By Admin 29 Jul 2021 •