RISC-V

News

MosChip Supports EMASS’s RISC-V Edge AI SoC - Embedded Computing Design

Abstract MosChip has partnered with EMASS to provide development support for EMASS's upcoming RISC-V Edge AI System-on-Chip (SoC). This collaboration focuses on creating specialized, highly efficient processing solutions tailored for demanding

By Admin 5 Dec 2025 • 1 min read •

RISC-V

Notes From the 2025 RISC-V Industry Development Conference (Full Report)

By Admin 5 Dec 2025 • 5 min read •

RISC-V

Notes From the 2025 RISC-V Industry Development Conference

Abstract The 2025 RISC-V Industry Development Conference demonstrated the architecture's accelerated commercial maturity and transition beyond traditional embedded markets. Key technological progress included the ratification of the RVA23 profile, which standardizes

By Admin 5 Dec 2025 • 2 min read •

News

Why a RISC-V board is my most exciting purchase of 2025 - How-To Geek (Full Report)

By Admin 4 Dec 2025 •

News

Why a RISC-V board is my most exciting purchase of 2025 - How-To Geek

Abstract The article expresses high enthusiasm for acquiring a RISC-V development board in 2025, signaling the architecture's transition from academic novelty to practical, accessible consumer hardware. This purchase is viewed as

By Admin 4 Dec 2025 • 2 min read •

Research

Underwater Optical Backscatter Communication using Acousto-Optic Beam Steering (Full Report)

By Admin 4 Dec 2025 •

Research

Underwater Optical Backscatter Communication using Acousto-Optic Beam Steering

Abstract This paper presents a novel approach to Underwater Optical Communication (UOC) by integrating Acousto-Optic Beam Steering (AOBS) with optical backscatter technology. The innovation allows for rapid, non-mechanical steering of the optical link,

By Admin 4 Dec 2025 • 2 min read •

Research

OpenDRAM: A Modular, High-performance Soft Memory Controller for DDR4 DRAM (Full Report)

By Admin 4 Dec 2025 •

Research

OpenDRAM: A Modular, High-performance Soft Memory Controller for DDR4 DRAM

Abstract OpenDRAM introduces a novel, high-performance soft memory controller specifically engineered for the DDR4 standard, offering a fully open-source alternative to proprietary IP blocks. The key innovation is its modular architecture, which allows

By Admin 4 Dec 2025 • 2 min read •

News

Risc-v Cores and Neuromorphic Arrays Enable Scalable Digital Processors for EdgeAI Applications - Quantum Zeitgeist (Full Report)

By Admin 3 Dec 2025 •

News

Risc-v Cores and Neuromorphic Arrays Enable Scalable Digital Processors for EdgeAI Applications - Quantum Zeitgeist

Abstract The research focuses on developing scalable digital processors for Edge AI by integrating flexible RISC-V cores with highly efficient neuromorphic computing arrays. This hybrid architecture leverages the strengths of both paradigms to

By Admin 3 Dec 2025 • 1 min read •

Research

E2AR: An Energy-Efficient Augmented Reality Framework for Collaborative Multi-Drone Systems (Full Report)

By Admin 3 Dec 2025 •