Research

Research

OpenDRAM: A Modular, High-performance Soft Memory Controller for DDR4 DRAM

Abstract OpenDRAM introduces a novel, high-performance soft memory controller specifically engineered for the DDR4 standard, offering a fully open-source alternative to proprietary IP blocks. The key innovation is its modular architecture, which allows

By Admin 4 Dec 2025 • 2 min read •

Research

Lightweight Unified Sha-3/Shake Architecture with a Fault-Resilient State (Full Report)

By Admin 3 Dec 2025 • 3 min read •

Research

Lightweight Unified Sha-3/Shake Architecture with a Fault-Resilient State

Abstract This paper presents a lightweight, unified hardware architecture for SHA-3 and SHAKE hash functions, specifically designed for resource-constrained Post-quantum Cryptography (PQC) applications. The core innovation is a fault-resilient design that uses a

By Admin 3 Dec 2025 • 2 min read •

Research

E2AR: An Energy-Efficient Augmented Reality Framework for Collaborative Multi-Drone Systems (Full Report)

By Admin 3 Dec 2025 •

Research

E2AR: An Energy-Efficient Augmented Reality Framework for Collaborative Multi-Drone Systems

Abstract E2AR is an energy-efficient Augmented Reality framework specifically designed to facilitate collaborative tasks within multi-drone systems operating at the edge. It tackles the significant computational and communication overhead associated with real-time AR

By Admin 3 Dec 2025 • 2 min read •

Research

From RISC-V Cores to Neuromorphic Arrays: A Tutorial on Building Scalable Digital Neuromorphic Processors (Full Report)

By Admin 27 Nov 2025 • 3 min read •

Research

From RISC-V Cores to Neuromorphic Arrays: A Tutorial on Building Scalable Digital Neuromorphic Processors

Abstract This tutorial paper outlines the architectural design principles for scalable digital neuromorphic processors suitable for low-power EdgeAI applications, using the SENECA platform as a primary example. The approach starts with flexible arrays

By Admin 27 Nov 2025 • 2 min read •

Research

Aquas: Enhancing Domain Specialization through Holistic Hardware-Software Co-Optimization based on MLIR (Full Report)

By Admin 27 Nov 2025 • 3 min read •

Research

Aquas: Enhancing Domain Specialization through Holistic Hardware-Software Co-Optimization based on MLIR

Abstract Aquas is a novel, MLIR-based holistic hardware-software co-design framework addressing the performance limitations of existing open-source RISC-V ASIP frameworks. It enhances specialization via hardware improvements like a burst DMA engine and advanced

By Admin 27 Nov 2025 • 2 min read •

Research

RISC-V Based TinyML Accelerator for Depthwise Separable Convolutions in Edge AI (Full Report)

By Admin 26 Nov 2025 • 3 min read •

Research

RISC-V Based TinyML Accelerator for Depthwise Separable Convolutions in Edge AI

Abstract This paper introduces a novel RISC-V Custom Function Unit (CFU) accelerator designed for TinyML applications, targeting the high memory wall cost associated with Depthwise Separable Convolutions (DSCs). The architecture utilizes a fused

By Admin 26 Nov 2025 • 2 min read •

Research

Chip Industry Technical Paper Roundup: Nov. 26 - Semiconductor Engineering (Full Report)

By Admin 26 Nov 2025 •