Research

Research

Using a Performance Model to Implement a Superscalar CVA6

Abstract Researchers developed a highly accurate performance model (99.2% on CoreMark) for the CVA6 RISC-V processor to evaluate architectural modifications prior to RTL implementation. This model was successfully utilized during the design

By Admin 2 Oct 2024 • 1 min read •

Research

A Reconfigurable Approximate Computing RISC-V Platform for Fault-Tolerant Applications (Full Report)

By Admin 1 Oct 2024 • 3 min read •

Research

A Reconfigurable Approximate Computing RISC-V Platform for Fault-Tolerant Applications

Abstract This paper presents "phoeniX," a novel reconfigurable embedded platform built upon the standard RISC-V ISA, designed to maximize energy efficiency through approximate computing while maintaining application-level accuracy. The platform uniquely

By Admin 1 Oct 2024 • 2 min read •

Research

Corner-Case Bug Hunting for RISC-V - Semiconductor Engineering (Full Report)

By Admin 30 Sep 2024 •

Research

Corner-Case Bug Hunting for RISC-V - Semiconductor Engineering

Abstract The article addresses the critical challenge of verifying RISC-V cores against subtle and complex hardware flaws, focusing specifically on methodologies for hunting 'corner-case' bugs. These elusive faults often arise from

By Admin 30 Sep 2024 • 2 min read •

Research

Google announces chip design AI 'AlphaChip', already used to design smartphone chips and AI-specific chips - GIGAZINE

Originally published on Google News - RISC-V Research Google announces chip design AI 'AlphaChip', already used to design smartphone chips and AI-specific chips  GIGAZINE

By Admin 27 Sep 2024 •

Research

FlooNoC: A 645 Gbps/link 0.15 pJ/B/hop Open-Source NoC with Wide Physical Links and End-to-End AXI4 Parallel Multi-Stream Support (Full Report)

By Admin 26 Sep 2024 • 4 min read •

Research

FlooNoC: A 645 Gbps/link 0.15 pJ/B/hop Open-Source NoC with Wide Physical Links and End-to-End AXI4 Parallel Multi-Stream Support

Abstract FlooNoC is an open-source Network-on-Chip (NoC) designed specifically for the massive bulk data transfer demands of modern AI accelerators, featuring very wide, AXI4-compliant physical links. It achieves a leading energy efficiency of

By Admin 26 Sep 2024 • 2 min read •

Research

How AlphaChip transformed computer chip design - Google DeepMind (Full Report)

By Admin 26 Sep 2024 •

Research

In Nature.com article, Qamcom collaborates with Pragmatic and Harvard to highlight joint project for pioneering semiconductor applications in wearables, healthcare devices and smart packaging - Mynewsdesk

Originally published on Google News - RISC-V Research In Nature.com article, Qamcom collaborates with Pragmatic and Harvard to highlight joint project for pioneering semiconductor applications in wearables, healthcare devices and smart packaging

By Admin 26 Sep 2024 •

Research

How AlphaChip transformed computer chip design - Google DeepMind

Abstract Google DeepMind's 'AlphaChip' system introduces a revolutionary paradigm shift by utilizing deep reinforcement learning (DRL) to automate and optimize integrated circuit physical design, specifically floorplanning. This AI system

By Admin 26 Sep 2024 • 2 min read •

Research

Bendable non-silicon RISC-V microprocessor - Nature (Full Report)

By Admin 25 Sep 2024 •