Research
Research
From CISC to RISC: language-model guided assembly transpilation
Abstract
This paper introduces CRT, a lightweight LLM-based assembly transpiler designed to automatically convert x86 (CISC) code to RISC architectures like ARM and RISC-V. This tool addresses the fundamental challenge of migrating legacy
Research
Teaching Experiences using the RVfpga Package
Abstract
The RVfpga course provides a robust, hands-on introduction to computer architecture using the RISC-V instruction set and FPGA technology. This paper details various successful teaching experiences, demonstrating its utility across undergraduate and
Research
RISC-V Word-Size Modular Instructions for Residue Number Systems
Abstract
This article introduces and evaluates specific word-size modular arithmetic instructions designed for the RISC-V Instruction Set Architecture (ISA) to significantly enhance the software implementation of Residue Number Systems (RNS), which are critical
Research
Advancing Cloud Computing Capabilities on gem5 by Implementing the RISC-V Hypervisor Extension
Abstract
This paper presents the successful implementation and rigorous evaluation of the RISC-V H (hypervisor) extension within the gem5 microarchitectural simulator. This integration is crucial for enhancing RISC-V's capabilities in cloud
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White paper on RISC-V market insights - Jon Peddie Research
Abstract
Jon Peddie Research released a comprehensive white paper providing critical market insights and forecasts for the rapidly expanding RISC-V ecosystem. The report analyzes the significant competitive advantages derived from the ISA'