Research

Research

Just TestIt! An SBST Approach To Automate System-Integration Testing

Abstract This paper introduces TestIt, an open-source Python package designed to automate full-system integration testing using a Software-Based Self-Test (SBST) approach. TestIt dynamically generates test vectors and golden references, significantly reducing development complexity

By Admin 10 Apr 2025 • 2 min read •

Research

ShadowBinding: Realizing Effective Microarchitectures for In-Core Secure Speculation Schemes (Full Report)

By Admin 9 Apr 2025 • 3 min read •

Research

ShadowBinding: Realizing Effective Microarchitectures for In-Core Secure Speculation Schemes

Abstract ShadowBinding proposes effective microarchitectures for state-of-the-art secure speculation schemes, such as Speculative Taint Tracking (STT) and Non-Speculative Data Access (NDA), addressing crucial performance bottlenecks in wide cores. The study reveals that rename-based

By Admin 9 Apr 2025 • 2 min read •

Research

Photonic chips developed to improve computing speed and reduce power consumption - Science Media Centre España (Full Report)

By Admin 9 Apr 2025 •

Research

Photonic chips developed to improve computing speed and reduce power consumption - Science Media Centre España

Abstract Researchers have developed innovative photonic chips intended to significantly enhance computing speed and efficiency. These chips utilize light-based processing to overcome the performance bottlenecks and energy constraints of traditional electronic circuits. The

By Admin 9 Apr 2025 • 2 min read •

Research

SpikeStream: Accelerating Spiking Neural Network Inference on RISC-V Clusters with Sparse Computation Extensions (Full Report)

By Admin 8 Apr 2025 • 3 min read •

Research

SpikeStream: Accelerating Spiking Neural Network Inference on RISC-V Clusters with Sparse Computation Extensions

Abstract This paper presents SpikeStream, an optimization technique designed to accelerate Spiking Neural Network (SNN) inference on general-purpose RISC-V multicore clusters using a low-overhead ISA extension for sparse computation streaming. SpikeStream maps weight

By Admin 8 Apr 2025 • 2 min read •

Research

CVA6-VMRT: A Modular Approach Towards Time-Predictable Virtual Memory in a 64-bit Application Class RISC-V Processor (Full Report)

By Admin 8 Apr 2025 • 3 min read •

Research

CVA6-VMRT: A Modular Approach Towards Time-Predictable Virtual Memory in a 64-bit Application Class RISC-V Processor

Abstract CVA6-VMRT proposes a modular hardware extension for the open-source RISC-V CVA6 core to achieve time-predictable virtual memory, addressing a critical need in complex autonomous systems. This design incorporates dynamically partitioned Translation Look-aside

By Admin 8 Apr 2025 • 2 min read •

Research

FERIVer: An FPGA-assisted Emulated Framework for RTL Verification of RISC-V Processors (Full Report)

By Admin 7 Apr 2025 • 3 min read •

Research

FERIVer: An FPGA-assisted Emulated Framework for RTL Verification of RISC-V Processors

Abstract FERIVer is a novel FPGA-assisted System-on-Chip framework designed to accelerate the Register Transfer Level (RTL) verification of RISC-V processors. It resolves the traditional trade-off between speed and accuracy by leveraging an embedded

By Admin 7 Apr 2025 • 1 min read •

Research

Virtual memory for real-time systems using hPMP (Full Report)

By Admin 6 Apr 2025 • 3 min read •