Research
Research
Near-Optimal Cache Sharing through Co-Located Parallel Scheduling of Threads
Abstract
This work introduces a novel mechanism, Co-Located Parallel Scheduling, aimed at achieving near-optimal efficiency in shared cache utilization among competing threads. The innovation focuses on intelligently grouping and scheduling threads whose memory
Research
A Direct Memory Access Controller (DMAC) for Irregular Data Transfers on RISC-V Linux Systems
Abstract
This paper introduces a novel Direct Memory Access Controller (DMAC) specifically optimized to efficiently handle arbitrary transfers of small unit sizes, addressing the inefficiency of classical descriptor-based DMACs in heterogeneous computing environments.
Research
Sequencing on Silicon: AI SoC Design for Mobile Genomics at the Edge
Abstract
This paper presents a specialized CMOS System-on-Chip (SoC) designed to handle the extremely high data rates of mobile nanopore DNA sequencing, advancing genomic analysis at the edge. The proposed architecture employs a
Research
A High-Efficiency SoC for Next-Generation Mobile DNA Sequencing
Abstract
This paper presents a high-efficiency System-on-Chip (SoC) designed to enable truly mobile, real-time DNA sequencing by overcoming the computational limits of current hand-sized machines that rely on external processing. The SoC is
Research
A Dense and Efficient Instruction Set Architecture Encoding
Abstract
This paper introduces Scry, a novel and experimental Instruction Set Architecture (ISA) designed to maximize instruction density and encoding efficiency for modern processor implementations. Scry achieves instruction-feature parity with RISC-V's
Research
A Compact, Low Power Transprecision ALU for Smart Edge Devices
Abstract
This work introduces TALU, a novel ASIC design for a Transprecision Arithmetic and Logic Unit tailored for energy-efficient machine learning on smart edge devices. TALU supports Posit, Floating Point, and Integer formats