Research

Research

MultiVic: A Time-Predictable RISC-V Multi-Core Processor Optimized for Neural Network Inference

Abstract MultiVic is a novel, time-predictable RISC-V multi-core vector processor designed to meet the high-performance and strict predictability requirements of neural network inference in real-time systems. The architecture ensures predictable timing behavior by

By Admin 7 Nov 2025 • 2 min read •

Research

TT-Edge: A Hardware-Software Co-Design for Energy-Efficient Tensor-Train Decomposition on Edge AI (Full Report)

By Admin 7 Nov 2025 • 3 min read •

Research

TT-Edge: A Hardware-Software Co-Design for Energy-Efficient Tensor-Train Decomposition on Edge AI

Abstract TT-Edge is a hardware-software co-designed framework engineered to overcome the high latency and energy costs associated with Tensor Train Decomposition (TTD) on resource-constrained edge AI devices. It achieves this by offloading compute-intensive

By Admin 7 Nov 2025 • 2 min read •

Research

FiCABU: A Fisher-Based, Context-Adaptive Machine Unlearning Processor for Edge AI (Full Report)

By Admin 6 Nov 2025 • 3 min read •

Research

FiCABU: A Fisher-Based, Context-Adaptive Machine Unlearning Processor for Edge AI

Abstract FiCABU (Fisher-based Context-Adaptive Balanced Unlearning) is a novel software-hardware co-design that integrates efficient machine unlearning capabilities into a RISC-V edge AI processor. This system employs Context-Adaptive Unlearning, starting edits from back-end layers,

By Admin 6 Nov 2025 • 2 min read •

Research

Update NDP: On Offloading Modifications to Smart Storage with Transactional Guarantees in Near-Data Processing DBMS (Full Report)

By Admin 4 Nov 2025 •

Research

Update NDP: On Offloading Modifications to Smart Storage with Transactional Guarantees in Near-Data Processing DBMS

Abstract This work introduces "Update NDP," a novel approach for extending Near-Data Processing (NDP) capabilities to handle database modification operations safely and efficiently. It proposes offloading complex update logic directly onto

By Admin 4 Nov 2025 • 2 min read •

Research

FeNN-DMA: A RISC-V SoC for SNN acceleration (Full Report)

By Admin 1 Nov 2025 • 3 min read •

Research

FeNN-DMA: A RISC-V SoC for SNN acceleration

Abstract Spiking Neural Networks (SNNs), despite their energy efficiency, are poorly matched to conventional accelerators due to low arithmetic intensity. To address this, the authors introduce FeNN-DMA, a novel, fully-programmable RISC-V System-on-Chip tailored

By Admin 1 Nov 2025 • 1 min read •

Research

Brevis Research Paper: ZKVM and Data Co-Processor - The Infinite Trustworthy Computing Layer - Bitget (Full Report)

By Admin 27 Oct 2025 •

Research

Brevis Research Paper: ZKVM and Data Co-Processor - The Infinite Trustworthy Computing Layer - Bitget

Abstract Brevis's research outlines a novel architecture integrating a Zero-Knowledge Virtual Machine (ZKVM) with a dedicated Data Co-Processor to establish an "Infinite Trustworthy Computing Layer." This system is designed

By Admin 27 Oct 2025 • 2 min read •

Research

Proving and Rewarding Client Diversity to Strengthen Resilience of Blockchain Networks (Full Report)

By Admin 27 Oct 2025 •