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Towards Base-Station-On-Chip: Wireless Communication Kernels On A RISC-V Vector Processor (TU Dresden, CeTI) - Semiconductor Engineering

Abstract Researchers from TU Dresden's Center for Tactile Internet (CeTI) are investigating the potential of the RISC-V Vector Processor to efficiently handle demanding wireless communication kernels. This research aims to prove

By Admin 10 Jun 2025 • 2 min read •

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Chip Industry Technical Paper Roundup: June 9 - Semiconductor Engineering (Full Report)

By Admin 9 Jun 2025 •

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Momentum Builds on RISC-V European Adoption - EE Times (Full Report)

By Admin 9 Jun 2025 •

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Chip Industry Technical Paper Roundup: June 9 - Semiconductor Engineering

Abstract The Chip Industry Technical Paper Roundup for June 9 compiles recent research breakthroughs across various facets of semiconductor technology. The featured papers generally focus on overcoming scaling limitations, implementing advanced 2.5D/

By Admin 9 Jun 2025 • 2 min read •

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Momentum Builds on RISC-V European Adoption - EE Times

Abstract The article reports a significant acceleration in the adoption of the RISC-V instruction set architecture (ISA) across Europe. This growing momentum is driven by increasing industrial investment and academic collaboration seeking open

By Admin 9 Jun 2025 • 1 min read •

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Open-Source RISC-V Cores: Analysis Of Scalar and Superscalar Architectures And Out-Of-Order Machines - Semiconductor Engineering (Full Report)

By Admin 5 Jun 2025 •

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Open-Source RISC-V Cores: Analysis Of Scalar and Superscalar Architectures And Out-Of-Order Machines - Semiconductor Engineering

Abstract The article analyzes the diverse architectural landscape of open-source RISC-V cores, contrasting simple scalar designs with complex superscalar and out-of-order machines. It examines the critical engineering trade-offs between design complexity, power consumption,

By Admin 5 Jun 2025 • 2 min read •

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RISC-V Turns 15 With Fast Global Adoption - EE Times (Full Report)

By Admin 22 May 2025 •

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RISC-V Turns 15 With Fast Global Adoption - EE Times

Abstract RISC-V celebrates its 15th anniversary, signifying a major milestone for the open standard Instruction Set Architecture (ISA). The architecture is currently experiencing explosive, rapid global adoption, moving far beyond its academic roots

By Admin 22 May 2025 • 2 min read •

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Chip Industry Technical Paper Roundup: May 20 - Semiconductor Engineering (Full Report)

By Admin 20 May 2025 •

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Chip Industry Technical Paper Roundup: May 20 - Semiconductor Engineering

Abstract The "Chip Industry Technical Paper Roundup: May 20" likely summarizes significant recent research across the semiconductor ecosystem, addressing critical challenges in scaling, power efficiency, and advanced manufacturing. Key topics typically

By Admin 20 May 2025 • 2 min read •

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Automotive Industry Charts New Course with RISC-V - EE Times (Full Report)

By Admin 16 May 2025 •