Architecture
Research
Power Side-Channel Analysis of the CVA6 RISC-V Core at the RTL Level Using VeriSide
Abstract
This paper investigates the security of the CVA6 RISC-V core against power side-channel attacks by employing an RTL-level power profiling framework called VeriSide. The analysis targeted a software-based AES encryption implementation and
Research
PermuteV: A Performant Side-channel-Resistant RISC-V Core Securing Edge AI Inference
Abstract
PermuteV is a performant side-channel resistant RISC-V core designed to secure Edge AI inference models against physical attacks, which frequently expose confidential neural network data. The core employs a novel hardware-accelerated defense
Research
Pipeline Stage Resolved Timing Characterization of FPGA and ASIC Implementations of a RISC V Processor
Abstract
This paper presents a pipeline stage resolved timing characterization framework to systematically compare a 32-bit RISC-V processor implemented on a 20 nm FPGA and a 7 nm FinFET ASIC. The analysis demonstrates
Research
Lyra: A Hardware-Accelerated RISC-V Verification Framework with Generative Model-Based Processor Fuzzing
Abstract
Lyra is a novel heterogeneous RISC-V verification framework that pairs hardware acceleration via an FPGA SoC with an ISA-aware generative model, LyraGen, for processor fuzzing. This methodology enables high-throughput differential checking and
Research
Reproducibility and Standardization in gem5 Resources v25.0
Abstract
This paper introduces significant improvements in gem5 and gem5 Resources v25.0 to address critical challenges in simulation reproducibility and standardization within computer architecture research. Key innovations include standardizing disk image creation
Research
Lightweight Unified Sha-3/Shake Architecture with a Fault-Resilient State
Abstract
This paper presents a lightweight, unified hardware architecture for SHA-3 and SHAKE hash functions, specifically designed for resource-constrained Post-quantum Cryptography (PQC) applications. The core innovation is a fault-resilient design that uses a