Research

Quantum-Resistant FOTA: End-to-End Decentralized Firmware Updates for IoT Using Blockchain and CRYSTALS-Dilithium

Abstract This paper presents a novel, quantum-resistant (QR) firmware update architecture designed to secure the critical Firmware Over-The-Air (FOTA) process for resource-constrained IoT devices. The system achieves end-to-end decentralization and integrity by leveraging

By Admin 17 Dec 2025 • 2 min read •

Research

Design of a USB RAID Controller for ARM SBC cluster server

Abstract This paper presents the design and implementation of a novel USB RAID controller specifically engineered for ARM Single Board Computer (SBC) cluster servers. The innovation addresses significant storage and redundancy limitations inherent

By Admin 17 Dec 2025 • 2 min read •

Research

Towards high scalability and fine-grained parallelism on distributed HPC platforms

Abstract Distributed High-Performance Computing (HPC) platforms face significant challenges in achieving simultaneous high scalability and fine-grained parallelism due to communication and synchronization overhead. This paper introduces a novel architecture and runtime co-design approach

By Admin 17 Dec 2025 • 2 min read •

Research

LOFMPL: An Open-source Logic Optimization Framework with MFFC-based Hypergraph Partition and Reinforcement Learning for Large Circuits

Abstract LOFMPL is an open-source framework designed for advanced logic optimization, specifically targeting the challenges presented by extremely large integrated circuits. It utilizes a scalable, two-pronged optimization approach, starting with Maximal Fanout-Free Cone

By Admin 17 Dec 2025 • 2 min read •

Research

Hardware-Level QoS Enforcement Features: Technologies, Use Cases, and Research Challenges

Abstract This comprehensive survey analyzes the landscape of hardware-level Quality of Service (QoS) enforcement features, critical for mitigating resource interference in modern multi-core and heterogeneous computing systems. The paper systematically reviews existing technologies,

By Admin 17 Dec 2025 • 2 min read •

News

Qualcomm acquires Ventana Micro Systems - Evertiq

Abstract Qualcomm has announced the strategic acquisition of Ventana Micro Systems, a leading developer of high-performance RISC-V CPU core designs. Ventana specializes in building sophisticated RISC-V solutions primarily targeting the data center, cloud,

By Admin 16 Dec 2025 • 1 min read •

News

Qualcomm’s Ventana acquisition points to a long-term RISC-V strategy to complement its Arm lineup - Tom's Hardware

Abstract Qualcomm's acquisition of Ventana Micro Systems signifies a substantial, long-term commitment to developing the RISC-V architecture. This strategic investment is designed to complement Qualcomm's existing dominance in the

By Admin 16 Dec 2025 • 1 min read •

News

VEGA AS2161 “DHRUV64” – A 1GHz dual-core 64-bit RISC-V microprocessor designed in India - CNX Software

Abstract The VEGA AS2161, marketed as the “DHRUV64,” is a significant new development in the RISC-V ecosystem, featuring a 64-bit, dual-core microprocessor architecture. Operating at a respectable 1 GHz clock speed, this chip

By Admin 16 Dec 2025 • 1 min read •

News

Qualcomm’s Ventana acquisition points to a long-term RISC-V strategy to complement its Arm lineup - Tom's Hardware

Originally published on Google News - RISC-V Qualcomm’s Ventana acquisition points to a long-term RISC-V strategy to complement its Arm lineup  Tom's Hardware AI Analysis Key Highlights * Major Acquisition: Qualcomm

By Admin 16 Dec 2025 • 1 min read •

News

LilyGo T-Display P4 handheld has an ESP32-P4 RISC-V processor and a 4.1 inch display - Liliputing

Abstract LilyGo has introduced the T-Display P4 handheld, a new development device integrating Espressif's powerful ESP32-P4 RISC-V processor. This handheld features a 4.1-inch display, making it suitable for portable interface

By Admin 16 Dec 2025 • 2 min read •

Embedded

VEGA AS2161 “DHRUV64” – A 1GHz dual-core 64-bit RISC-V microprocessor designed in India

Abstract The Government of India has launched the DHRUV64 (VEGA AS2161), an indigenous dual-core 64-bit RISC-V microprocessor developed by C-DAC, marking a significant progression in the country's semiconductor efforts. Clocked at

By Admin 16 Dec 2025 • 1 min read •

Research

Toward Comprehensive Design Space Exploration on Heterogeneous Multi-core Processors

Abstract Designing optimal heterogeneous multi-core processors requires navigating an exponentially large Design Space Exploration (DSE) covering core mixes, interconnects, and scheduling policies. This paper introduces a novel, comprehensive DSE framework specifically tailored for

By Admin 16 Dec 2025 • 2 min read •