News

Hardware hacker installs Minecraft server on a cheap smart lightbulb — single 192 MHz RISC-V core with 276KB of RAM, enough to run tiny 90K byte world - Tom's Hardware

Originally published on Google News - RISC-V Hardware hacker installs Minecraft server on a cheap smart lightbulb — single 192 MHz RISC-V core with 276KB of RAM, enough to run tiny 90K byte world

By Admin 10 Nov 2025 •

Research

Hardware-Aware Neural Network Compilation with Learned Optimization: A RISC-V Accelerator Approach

Abstract The XgenSilicon ML Compiler is an automated end-to-end framework that optimizes high-level machine learning models into highly efficient RISC-V assembly code for custom ASIC accelerators. This system unifies software and hardware cost

By Admin 10 Nov 2025 • 2 min read •

Research

Bespoke Co-processor for Energy-Efficient Health Monitoring on RISC-V-based Flexible Wearables

Abstract This work introduces a highly energy-efficient, mechanically flexible RISC-V system designed for on-body health monitoring, addressing the challenges posed by the power constraints and limited gate counts of flexible electronics. The core

By Admin 8 Nov 2025 • 2 min read •

Research

MultiVic: A Time-Predictable RISC-V Multi-Core Processor Optimized for Neural Network Inference

Abstract MultiVic is a novel, time-predictable RISC-V multi-core vector processor designed to meet the high-performance and strict predictability requirements of neural network inference in real-time systems. The architecture ensures predictable timing behavior by

By Admin 7 Nov 2025 • 2 min read •

Research

TT-Edge: A Hardware-Software Co-Design for Energy-Efficient Tensor-Train Decomposition on Edge AI

Abstract TT-Edge is a hardware-software co-designed framework engineered to overcome the high latency and energy costs associated with Tensor Train Decomposition (TTD) on resource-constrained edge AI devices. It achieves this by offloading compute-intensive

By Admin 7 Nov 2025 • 2 min read •

Research

FiCABU: A Fisher-Based, Context-Adaptive Machine Unlearning Processor for Edge AI

Abstract FiCABU (Fisher-based Context-Adaptive Balanced Unlearning) is a novel software-hardware co-design that integrates efficient machine unlearning capabilities into a RISC-V edge AI processor. This system employs Context-Adaptive Unlearning, starting edits from back-end layers,

By Admin 6 Nov 2025 • 2 min read •

News

Arteris and Alibaba (BABA) XuanTie Expand RISC-V Collaboration - Yahoo Finance

Abstract Arteris and Alibaba (BABA) XuanTie have announced an expanded collaboration focused on accelerating the development within the RISC-V ecosystem. This partnership aims to deeply integrate Arteris' high-performance Network-on-Chip (NoC) technology with

By Admin 6 Nov 2025 • 2 min read •

Research

Update NDP: On Offloading Modifications to Smart Storage with Transactional Guarantees in Near-Data Processing DBMS

Abstract This work introduces "Update NDP," a novel approach for extending Near-Data Processing (NDP) capabilities to handle database modification operations safely and efficiently. It proposes offloading complex update logic directly onto

By Admin 4 Nov 2025 • 2 min read •

Research

FeNN-DMA: A RISC-V SoC for SNN acceleration

Abstract Spiking Neural Networks (SNNs), despite their energy efficiency, are poorly matched to conventional accelerators due to low arithmetic intensity. To address this, the authors introduce FeNN-DMA, a novel, fully-programmable RISC-V System-on-Chip tailored

By Admin 1 Nov 2025 • 1 min read •

News

The next RISC-V processor frontier: AI - EDN - Voice of the Engineer

Abstract The article highlights Artificial Intelligence (AI) as the crucial next frontier for the RISC-V processor architecture. This expansion leverages the open-standard nature of RISC-V to enable the creation of specialized, high-performance computing

By Admin 31 Oct 2025 • 2 min read •

News

RISC-V Summit spurs new round of automotive support - EDN - Voice of the Engineer

Abstract The RISC-V Summit catalyzed a significant expansion of industry support for adopting the open-source architecture in automotive applications. Announcements focused on addressing critical requirements like functional safety and reliability, essential for integration

By Admin 30 Oct 2025 • 2 min read •

News

Easy RISC-V Provides an Interactive Way to Explore the RISC-V Architecture - LinuxGizmos.com

Abstract Easy RISC-V is a newly announced interactive platform offering an accessible way for users to explore and understand the complexities of the RISC-V Instruction Set Architecture. Designed to lower the barrier to

By Admin 29 Oct 2025 • 1 min read •