Research
SG2042 64-Core RISC-V CPU Versus Existing RISC-V HW And High Performance x86 CPUs - Semiconductor Engineering
Abstract
The technical analysis focuses on the SG2042, a monumental 64-core CPU built upon the RISC-V instruction set architecture, representing a critical push into high-performance computing (HPC) markets. The study rigorously compares the
Research
Compressed Real Numbers for AI: a case-study using a RISC-V CPU
Abstract
This paper investigates optimizing Deep Neural Network (DNN) inference on CPUs by utilizing compressed number formats like bfloat and posit to reduce memory bandwidth demands. The core innovation is proposing a method
Research
Octopus: A Heterogeneous In-network Computing Accelerator Enabling Deep Learning for network
Abstract
The Octopus accelerator addresses the challenge of deploying Deep Learning (DL) models directly onto programmable in-network computing devices, which typically lack the necessary processing power and generality. It employs a heterogeneous architecture
Research
Unlocking Hardware Security Assurance: The Potential of LLMs
Abstract
This paper introduces the Natural Language Processing-based Security Property Generator (NSPG), a novel automated method designed to enhance hardware security assurance in complex System-on-Chips (SoCs). NSPG utilizes HS-BERT, the first language model
Research
Towards a Formally Verified Security Monitor for VM-based Confidential Computing
Abstract
This paper proposes a novel methodology for formally modeling and proving a security monitor for VM-based confidential computing, addressing the lack of verification in existing systems critical for high-assurance applications. It introduces
🔒 Members