Research

When Radiation Meets Linux: Analyzing Soft Errors in Linux on COTS SoCs under Proton Irradiation

Abstract This study analyzes the vulnerability of Linux running on Commercial Off-The-Shelf (COTS) System-on-Chips (SoCs) to radiation-induced soft errors using 20-50 MeV proton irradiation. Testing diverse architectures, including ARM Cortex-A53 (14 nm FinFET

By Admin 5 Mar 2025 • 2 min read •

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News

Exclusive: China to publish policy to boost RISC-V chip use nationwide, sources say - Reuters (Full Report)

By Admin 4 Mar 2025 •

News

Exclusive: China to publish policy to boost RISC-V chip use nationwide, sources say - Reuters

Abstract China is preparing to publish a significant national policy designed to aggressively boost the use of RISC-V chips across various sectors nationwide. This governmental initiative signals a strategic commitment to standardizing the

By Admin 4 Mar 2025 • 2 min read •

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Research

RISC-V High Performance Multicore and GPU SoC Platform For Safety Critical System - Semiconductor Engineering (Full Report)

By Admin 3 Mar 2025 •

Research

RISC-V High Performance Multicore and GPU SoC Platform For Safety Critical System - Semiconductor Engineering

Abstract This article details a new System-on-Chip (SoC) platform built on the RISC-V Instruction Set Architecture, specifically designed for stringent safety-critical systems. The platform integrates high-performance multicore CPU clusters alongside an integrated GPU,

By Admin 3 Mar 2025 • 2 min read •

Research

DeepVerifier: Learning to Update Test Sequences for Coverage-Guided Verification (Full Report)

By Admin 1 Mar 2025 •

Research

DeepVerifier: Learning to Update Test Sequences for Coverage-Guided Verification

Abstract DeepVerifier introduces a novel machine learning framework designed to optimize hardware verification efficiency by intelligently updating existing test sequences for coverage closure. The system utilizes deep reinforcement learning (DRL) to guide the

By Admin 1 Mar 2025 • 2 min read •

Research

A RISC-V Multicore and GPU SoC Platform with a Qualifiable Software Stack for Safety Critical Systems (Full Report)

By Admin 28 Feb 2025 • 3 min read •

Research

A RISC-V Multicore and GPU SoC Platform with a Qualifiable Software Stack for Safety Critical Systems

Abstract This paper introduces the METASAT platform, a novel RISC-V multicore and GPU System-on-Chip designed as a prototype for future safety-critical space missions. The architecture integrates a space-grade NOEL-V multiprocessor with the SPARROW

By Admin 28 Feb 2025 • 1 min read •

Research

Enhancing software-hardware co-design for HEP by low-overhead profiling of single- and multi-threaded programs on diverse architectures with Adaptyst (Full Report)

By Admin 28 Feb 2025 • 3 min read •

Research

Enhancing software-hardware co-design for HEP by low-overhead profiling of single- and multi-threaded programs on diverse architectures with Adaptyst

Abstract The paper introduces Adaptyst, an open-source and architecture-agnostic tool designed to enhance software-hardware co-design for complex applications like High Energy Physics (HEP). Adaptyst provides low-overhead profiling of single- and multi-threaded programs, tracing

By Admin 28 Feb 2025 • 2 min read •

Research

Wildcat: Educational RISC-V Microprocessors (Full Report)

By Admin 27 Feb 2025 • 3 min read •