Research
Multi-Core Architecture Optimized For Time-Predictable Neural Network Inference (FZI, KIT) - Semiconductor Engineering
Abstract
The research by FZI and KIT introduces a novel multi-core architecture specifically optimized to achieve time-predictable performance for Neural Network (NN) inference tasks. This design prioritizes deterministic latency guarantees over maximizing average
Research
Vorion: A RISC-V GPU with Hardware-Accelerated 3D Gaussian Rendering and Training
Abstract
Vorion is a novel RISC-V GPGPU prototype designed to provide dedicated hardware acceleration for the computationally intensive 3D Gaussian Splatting (3DGS) technique. It features a scalable architecture utilizing z-tiling and a Gaussian/
News
Wear This RISC V, RPN Calculator Watch For Maximum Nerd Cred - Hackaday
Abstract
A new wearable project featuring an RPN calculator watch utilizes the open-source RISC-V architecture, specifically targeting technical enthusiasts. This device blends classic Reverse Polish Notation calculation methods with a modern, customized hardware
News
Fragmentation to Standardization: Evaluating RISC-V’s Path Across Data Centers, Automotive, and Security - embedded.com
Abstract
The RISC-V architecture is undergoing a critical transition, moving from fragmented, custom implementations towards industry-wide standardization and compliance. This strategic shift is vital for securing necessary trust and adoption within high-stakes sectors
News
Canonical Gets Flutter Up And Running On RISC-V For Ubuntu - Phoronix
Abstract
Canonical has successfully enabled the deployment of Google's Flutter UI toolkit on the RISC-V architecture running Ubuntu. This significant development enhances the application development landscape, offering developers a popular, cross-platform
News
Breker Verification Systems and Frontgrade Gaisler Collaborate on High-Reliability RISC-V Fault Tolerant Processor Core - Business Wire
Abstract
Breker Verification Systems and Frontgrade Gaisler have partnered to develop a high-reliability, fault-tolerant RISC-V processor core. This collaboration leverages Breker's advanced verification automation tools to rigorously test the core'