Research
Static Hardware Partitioning on RISC-V -- Shortcomings, Limitations, and Prospects
Abstract
This paper investigates the viability of static hardware partitioning (SHP) on multi-core RISC-V processors essential for consolidating mixed-criticality and real-time embedded workloads while ensuring freedom from interference. The authors identify significant shortcomings
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Research
RTL to GDS-II flow Archives - Semiconductor Engineering
Abstract
The featured archive extensively covers the complete semiconductor physical design pipeline, detailing the critical conversion process from Register-Transfer Level (RTL) descriptions to the final manufacturing data format, GDS-II. It explores the methodologies
Research
Spatz: A Compact Vector Processing Unit for High-Performance and Energy-Efficient Shared-L1 Clusters
Abstract
Spatz is a novel, compact 32-bit vector processing unit designed as an energy-efficient Processing Element for large-scale clusters leveraging shared L1 memory, specifically targeting mitigation of the Von Neumann Bottleneck. Built upon
Research
ERIC: An Efficient and Practical Software Obfuscation Framework
Abstract
ERIC is an efficient and general software obfuscation framework designed to protect distributed software executables against both static and dynamic analysis. It leverages Physical Unclonable Functions (PUFs) to generate unique device identifiers
Research
MiniFloat-NN and ExSdotp: An ISA Extension and a Modular Open Hardware Unit for Low-Precision Training on RISC-V cores
Abstract
This paper introduces MiniFloat-NN, a RISC-V Instruction Set Architecture (ISA) extension, and ExSdotp, a modular open hardware unit, designed to accelerate low-precision neural network training using 8-bit and 16-bit floating-point formats. The
Research
Experimental evaluation of neutron-induced errors on a multicore RISC-V platform
Abstract
This study experimentally evaluates neutron-induced soft errors on the GAP8 multicore RISC-V ASIC platform, addressing the need for reliability data in safety-critical domains. The research found that computing-intensive applications, specifically Convolutional Neural