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SoCMake: Modular RISC-V SoCs for Radiation-Harsh and Safety-Critical Environments

AI Analysis Abstract SoCMake, a component of the System-on-Chip Radiation-Tolerant Ecosystem (SOCRATES), is being developed to produce modular RISC-V SoCs for radiation-harsh and safety-critical environments. This work explores the early adoption of programmable SoCs in ASIC…

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Source: riscv.org

AI Analysis

Abstract

SoCMake, a component of the System-on-Chip Radiation-Tolerant Ecosystem (SOCRATES), is being developed to produce modular RISC-V SoCs for radiation-harsh and safety-critical environments. This work explores the early adoption of programmable SoCs in ASIC designs for high-energy physics (HEP) experiments, including applications like front-end detector readout and infrastructure monitoring. The platform incorporates fault-tolerant techniques such as triple modular redundancy (TMR), hardened interconnects, and memory protection, making it applicable to domains beyond HEP, such as automotive and industrial control systems. A prototype chip, TriglaV, designed for reliable operation in the radiation environment of Large Hadron Collider (LHC) detector front-end electronics, demonstrates the platform's capabilities.

Key Highlights

  • SoCMake is part of the System-on-Chip Radiation-Tolerant Ecosystem (SOCRATES).
  • It enables modular RISC-V SoCs for radiation-harsh and safety-critical environments.
  • Targets high-energy physics (HEP) experiments and other safety-critical domains.
  • Incorporates fault-tolerant techniques like triple modular redundancy (TMR), hardened interconnects, and memory protection.
  • TriglaV is a fully radiation-hardened prototype ASIC demonstrating the platform's capabilities for LHC detector front-end electronics.

Technical Details

  • The project focuses on programmable SoCs for control tasks and local data processing.
  • Fault-tolerant techniques include triple modular redundancy (TMR), hardened interconnects, and memory protection.
  • SoCMake is actively developed and used to produce prototype chips.
  • TriglaV is a fully radiation-hardened prototype ASIC.
  • TriglaV is designed for reliable operation in the radiation environment typical of Large Hadron Collider (LHC) detector front-end electronics.

Implications

  • Enables early adoption of programmable SoCs in ASIC designs for high-energy physics (HEP) experiments.
  • Supports a range of HEP applications, from front-end detector readout to infrastructure monitoring in harsh radiation environments.
  • Fault-tolerant techniques are applicable to safety-critical embedded controllers in domains such as automotive and industrial control systems.
  • Provides a foundation for optimizing SoC design through in-field operation in challenging environments.

Limitations

  • Current efforts primarily focus on programmable SoCs for control tasks and local data processing, such as chip calibration.
  • Physics data processing is identified as a longer-term prospect.
  • The platform is under active development, with ongoing work and future directions being reported.

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