When Radiation Meets Linux: Analyzing Soft Errors in Linux on COTS SoCs under Proton Irradiation

Abstract

This study analyzes the vulnerability of Linux running on Commercial Off-The-Shelf (COTS) System-on-Chips (SoCs) to radiation-induced soft errors using 20-50 MeV proton irradiation. Testing diverse architectures, including ARM Cortex-A53 (14 nm FinFET and 40 nm CMOS) and a RISC-V core on a 40 nm FPGA, the research establishes foundational reliability data for spaceborne computing. Results show the 14 nm FinFET SoC achieved 2-3x greater Linux uptime, while the work identifies key soft error-prone Linux kernel components across all architectures to guide targeted mitigations.

Report

Key Highlights

• Radiation Testing on COTS SoCs: The research provides much-needed public data by subjecting three distinct commercial platforms running the Linux OS to 20–50 MeV proton irradiation.
• Technology Node Impact: The 14 nm FinFET NXP SoC demonstrated significantly superior radiation tolerance, achieving 2–3 times longer Linux uptime compared to the 40 nm CMOS counterparts (Raspberry Pi Zero 2 W and OrangeCrab).
• Cross-Architecture Analysis: The study includes a cross-architecture evaluation covering ARM and RISC-V, offering insights into how different processor and fabrication technologies react to soft errors.
• Linux Vulnerability Mapping: It pinpoints specific, error-prone components within the monolithic Linux kernel (e.g., memory management), which is critical for developing software-level fault tolerance.

Technical Details

• Irradiation Method: Proton beam irradiation, applied at energies ranging from 20 MeV to 50 MeV, simulating radiation environments relevant to space applications.
• Tested Platforms and Architectures:
  • ARM Cortex-A53 (40 nm CMOS): Raspberry Pi Zero 2 W.
  • ARM Cortex-A53 (14 nm FinFET): NXP i.MX 8M Plus (demonstrated superior resilience, partially due to FinFET's reduced charge collection).
  • RISC-V Core (40 nm FPGA): OrangeCrab platform.
• OS Challenge: Linux's monolithic kernel structure is cited as a compounding vulnerability, as soft errors in one subsystem can quickly propagate to critical components like memory management (MMU).
• Mitigation Observation: The research notes that existing limited Error-Correcting Code (ECC) mechanisms offer minimal overall mitigation against catastrophic system failure caused by these soft errors.

Implications

• Advancing Space Computing: The data directly addresses the lack of public soft error information for COTS hardware, accelerating the adoption and mission readiness of inexpensive commercial SoCs in space environments (e.g., small satellites, cubesats).
• RISC-V Reliability Baseline: The inclusion of a RISC-V platform provides an essential benchmark for the architecture's inherent susceptibility to radiation. As RISC-V gains traction in high-reliability and aerospace applications, this data informs hardware hardening requirements and fault-tolerant OS design specific to RISC-V silicon.
• OS Hardening Focus: By identifying the specific kernel subsystems that are most susceptible to failure, researchers and developers can move beyond generic fixes. This facilitates the development of targeted, efficient software-based fault mitigation techniques within the Linux kernel, relevant across various architectures including future RISC-V deployments.
• FinFET Technology Validation: The finding that 14 nm FinFET offers greater intrinsic soft error resilience than 40 nm CMOS validates the potential of modern, scaled commercial manufacturing processes for use in high-radiation environments, reducing reliance on expensive, customized rad-hardened chips.