Vega: A 10-Core SoC for IoT End-Nodes with DNN Acceleration and Cognitive Wake-Up From MRAM-Based State-Retentive Sleep Mode
Abstract
Vega is a 10-core RISC-V System-on-Chip designed specifically for ultra-low-power IoT end-nodes requiring complex near-sensor analytics and high performance. It features a novel MRAM-based state-retentive cognitive sleep mode that consumes only 1.7 \muW, alongside specialized DNN acceleration. The SoC achieves state-of-the-art energy efficiency, delivering up to 1.3 TOPS/W for 8-bit DNN inference while maintaining flexibility through its multi-core RISC-V architecture.
Report
Key Highlights
- Ultra-Low Power Sleep: Achieves a 1.7 $\mu$W fully state-retentive cognitive sleep mode, crucial for maximizing IoT battery life, enabled by MRAM technology.
- State-of-the-Art Efficiency: Delivers an SoA-leading efficiency of 1.3 TOPS/W for 8-bit Deep Neural Network (DNN) inference, supported by dedicated hardware.
- High Performance: Features a peak performance of 32.2 GOPS (at 49.4 mW) on Near-Sensor Analytics Algorithms (NSAAs).
- 10 RISC-V Cores: Utilizes a heterogeneous architecture consisting of one core for management and IO, and a 9-core cluster for parallel computation.
- Programmable Acceleration: Includes two programmable Machine Learning (ML) accelerators (one for sleep mode, one for active state) to boost energy efficiency.
Technical Details
- Core Configuration: A 10-core RISC-V configuration split between a single management core and a 9-core compute cluster.
- Computation Capabilities: The core cluster supports multi-precision SIMD operations across integer and floating-point formats, providing high flexibility for varying workload types.
- Memory Hierarchy: Integrates 4 MB of non-volatile MRAM alongside 1.6 MB of state-retentive SRAM to ensure data retention during ultra-low power states.
- **Energy Efficiency Metrics (SoA-Leading):
- INT8 DNN (accelerated): 1.3 TOPS/W
- INT8 general computation: 615 GOPS/W
- FP32 computation: 79 GFLOPS/W
- FP16 computation: 129 GFLOPS/W
- Power Management: The system scales power consumption from 1.7 $\mu$W (sleep) up to 49.4 mW (peak active computation).
Implications
- Validation of RISC-V for Edge AI: Vega showcases the maturity and viability of RISC-V IP for highly complex, energy-constrained, and heterogeneous Systems-on-Chip required for modern edge AI applications and NSAAs.
- Advancement in Memory Technology: The effective use of MRAM for state-retentive sleep mode is critical. It allows for ultra-fast and energy-efficient recovery from sleep, fundamentally improving the duty cycle and perceived responsiveness of IoT devices.
- Enabling Flexible IoT Analytics: By combining flexible multi-precision computing (SIMD RISC-V cluster) with dedicated hardware acceleration, Vega provides a platform capable of handling fast-evolving ML models and complex analytic algorithms without immediate architectural obsolescence, a necessity for long-lifetime IoT end-nodes.
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