Towards a RISC-V Open Platform for Next-generation Automotive ECUs

Abstract

This paper presents a mixed-criticality, multi-OS architecture designed for next-generation automotive Electronic Control Units (ECUs) based on open hardware and open-source technologies. The heterogeneous platform utilizes a RISC-V processor running safety-critical AUTOSAR OS tasks alongside a multi-core ARM CPU handling advanced Linux functionalities. A quantitative gap analysis confirms that a hardware/software optimized RISC-V implementation delivers real-time features comparable to Commercial Off-The-Shelf (COTS) Arm Cortex-R processors, establishing RISC-V as a strong candidate for automotive safety stacks.

Report

Key Highlights

• Open Automotive Platform: The core innovation is an open-hardware and open-source platform targeting next-generation automotive ECUs to manage increasing system complexity and reduce costs.
• Mixed-Criticality Architecture: The design utilizes a heterogeneous multi-processor approach to integrate diverse functionalities onto fewer ECUs.
• RISC-V for Safety: Safety-critical applications are assigned to the RISC-V processor, specifically running the high-reliability AUTOSAR OS.
• Viability Confirmed: A quantitative gap analysis comparing the optimized RISC-V solution against COTS Arm Cortex-R processors validated RISC-V's suitability for running AUTOSAR Classic stacks with necessary real-time features.

Technical Details

• Target Domain: Next-generation automotive ECUs, driven by assisted/autonomous driving features.
• OS/CPU Assignment:
  • Safety/Critical: AUTOSAR OS runs on the RISC-V processor.
  • Advanced/Non-Critical: Linux OS runs on the multi-core ARM CPU.
• RISC-V Implementation: The study utilized an HW/SW optimized version of a RISC-V processor for benchmarking.
• Benchmarking Method: Quantitative gap analysis focused on assessing real-time features and performance.
• Benchmark Reference: The optimized RISC-V solution was directly compared against a COTS Arm Cortex-R processor.
• Focus Areas: Communication infrastructure and implementation stack are presented as crucial components of the architecture.

Implications

• Validation for Safety-Critical Systems: This work significantly advances the adoption of RISC-V by providing evidence that it can meet the strict real-time requirements necessary for automotive safety standards (AUTOSAR Classic stacks), an area traditionally dominated by specialized, proprietary architectures like Arm Cortex-R.
• Cost Reduction and Open Ecosystem: By leveraging open hardware and open source, the platform offers a pathway to reduce vehicle costs and avoid vendor lock-in solutions, democratizing the automotive supply chain.
• Acceleration of Heterogeneous Computing: The successful integration of RISC-V (for critical tasks) and ARM (for high-level tasks) within a single ECU design further validates the trend towards complex heterogeneous multi-processor systems in high-demand domains.
• Foundation for Future MCUs: The research establishes RISC-V as a valuable candidate for the design of next-generation automotive microcontrollers (MCUs) that require both high performance and certified safety characteristics.