Toward Open-Source Chiplets for HPC and AI: Occamy and Beyond

Abstract

This paper presents a roadmap for open-source RISC-V chiplet systems designed for high-performance computing (HPC) and artificial intelligence (AI), aiming to match the performance of proprietary architectures. The initiative introduces Occamy, the first open, silicon-proven dual-chiplet manycore fabricated in 12nm FinFET, followed by the mesh-NoC Ramora system. The roadmap culminates in the Ogopogo concept, a 7nm quad-chiplet design promising state-of-the-art compute density, alongside a commitment to expand openness to include simulation, EDA tools, PDKs, and off-die physical interfaces.

Report

Key Highlights

• Open-Source HPC Roadmap: The paper details a multi-generational plan for developing open-source, chiplet-based RISC-V systems specifically tailored for HPC and AI acceleration.
• Occamy Launchpad: Occamy is identified as the foundational project—the first open, silicon-proven dual-chiplet RISC-V manycore.
• Performance Focus: The primary goal is explicitly stated as closing the performance gap currently existing between open-source designs and established proprietary solutions.
• Three Generations: The roadmap encompasses Occamy, the intermediate Ramora, and the advanced concept architecture Ogopogo.
• Deep Openness Commitment: The authors aim to extend the definition of 'open' beyond core logic (RTL) to include critical aspects like simulation models, Electronic Design Automation (EDA) flows, Process Design Kits (PDKs), and off-die physical interfaces (PHYs).

Technical Details

• Occamy: This is a dual-chiplet RISC-V manycore system implemented in 12nm FinFET process technology.
• Ramora: This is the next stage in development, defined as a dual-chiplet system utilizing a mesh Network-on-Chip (NoC) architecture for inter-chiplet communication.
• Ogopogo: This represents the future concept architecture, projected as a 7nm quad-chiplet system designed to achieve state-of-the-art compute density metrics.
• Interconnect: The scaling architecture relies on advanced interconnect technologies, specifically mentioning a mesh-NoC structure.

Implications

• RISC-V Maturity in HPC: This roadmap provides concrete evidence that the RISC-V ecosystem is moving beyond embedded systems and actively targeting high-end, compute-intensive applications where proprietary designs currently dominate.
• Democratization of Hardware: By committing to making critical components (like EDA, PDKs, and PHYs) open, the project drastically lowers the barrier to entry for new researchers and companies to innovate, customize, and fabricate complex chiplet designs.
• Enabling Chiplet Ecosystem: Occamy and its successors validate the feasibility of an open-source chiplet approach, which is crucial for modular system design and efficient scaling in advanced technology nodes (e.g., 7nm).
• Supply Chain Transparency: Expanding openness beyond RTL enhances trust and verifiability across the entire hardware supply chain, a critical factor for sensitive high-performance computing infrastructure.