Switchboard: An Open-Source Framework for Modular Simulation of Large Hardware Systems

Abstract

The Switchboard open-source framework addresses the design bottleneck of simulating massive hardware systems by proposing a modular approach based on latency-insensitive interfaces. It achieves high throughput and rapid build times by utilizing prebuilt simulators for each hardware block, connecting them at runtime via fast shared-memory queues. This strategy enables massive parallelism without fine-grained synchronization, successfully demonstrating wafer-scale simulation involving one million RISC-V cores distributed across cloud compute clusters.

Report

Key Highlights

• Open-Source Framework: Switchboard is introduced as an open-source framework designed for the modular simulation of large hardware systems.
• Target: Specifically designed for systems composed of modular blocks connected by latency-insensitive interfaces.
• Performance Improvement: Directly addresses the simulation bottleneck (slow throughput and long build times) encountered when scaling up modern hardware designs.
• Core Innovation: Uses prebuilt, isolated simulators for each block, connecting them at runtime rather than relying on a single monolithic simulation build.
• Scalability Proof: Demonstrated scalability by performing a wafer-scale simulation of one million RISC-V cores distributed across thousands of cloud compute cores.

Technical Details

• Simulation Construction: The simulation is constructed dynamically, mirroring the modularity of the physical hardware design.
• Interface Requirement: Requires hardware blocks to communicate via latency-insensitive interfaces, which facilitates decoupled and asynchronous simulation.
• Communication Mechanism: Inter-simulator communication is managed using fast shared-memory queues, optimizing data exchange and minimizing synchronization overhead.
• Parallelism Model: Achieves simulation speed-up through parallel execution of simulator instances, avoiding the performance constraints associated with fine-grained synchronization or global barriers.
• Applications:
  • Application 1: Fast, interactive web application simulations of chiplets communicating on an interposer.
  • Application 2: Massively distributed, wafer-scale simulation environment for large multi-core processors (1 million RISC-V cores).

Implications

• Enabling Massive Scale RISC-V: Switchboard provides the necessary simulation infrastructure to efficiently verify and test extremely large RISC-V designs, such as massive clusters or wafer-scale computing initiatives involving millions of cores.
• Accelerating Modular Design: By drastically reducing build times and improving simulation throughput, Switchboard removes a critical bottleneck in the design flow for complex systems, particularly those utilizing chiplet architectures.
• Ecosystem Tooling: As an open-source framework, it offers the broader hardware and RISC-V community a standardized, scalable tool to tackle verification challenges associated with modularity and distributed computing architectures.
• Future of Hardware: The framework supports the industry trend toward massive parallel systems and addresses the simulation challenges arising from the decline of Moore's Law by focusing on efficient, coarse-grained distributed simulation.