Runtime Energy Monitoring for RISC-V Soft-Cores

Abstract

This paper introduces a holistic hardware-based approach for runtime energy monitoring specifically targeting RISC-V soft-cores implemented on FPGAs. The proposed system utilizes a dedicated measurement board coupled with an FPGA-based System-on-Module (SoM) to capture real-time currents and voltages, thus eliminating the need for complex, continuously tuned architectural models. This framework enables efficient design space exploration, specifically focusing on optimizing energy consumption for applications like shallow artificial neural networks in aeronautical design.

Report

Structured Report: Runtime Energy Monitoring for RISC-V Soft-Cores

Key Highlights

• Holistic Monitoring Approach: The authors propose a novel, holistic method for monitoring energy consumption at runtime, moving away from relying on complex software tools and micro-architectural models.
• Hardware Implementation: The core innovation involves coupling a specialized measurement board directly with an FPGA-based System-on-Module (SoM).
• Non-Intrusive Measurement: Energy consumption statistics are computed by a running service that reads values from a specific memory region, ensuring no extra computational resources are consumed on the FPGA device itself.
• Application Focus: The framework is designed to optimize performance and energy consumption, specifically using a shallow artificial neural network relevant to aeronautical design.
• Scalability: The approach is inherently scalable and applicable to monitoring multi-node infrastructures and clusters.

Technical Details

• Target Architecture: RISC-V based soft-cores implemented within an FPGA environment.
• Monitoring Hardware: A custom measurement board capable of capturing currents and voltages.
• Measurement Points: The system is designed to monitor and capture energy data from up to tens of measuring points driving the FPGA.
• Data Exposure: Captured voltage and current values are exposed to the computing system through mapping them into a dedicated memory region.
• Data Processing: A background service reads the memory region to calculate and extract energy consumption statistics, circumventing the resource overhead of performing calculations on the FPGA device.

Implications

• Accelerated Design Space Exploration: By providing accurate, real-time physical measurements instead of model estimates, the framework allows designers to rapidly tune and evaluate different RISC-V soft-core configurations (e.g., custom instructions or micro-architectural variations) with immediate energy feedback.
• Improved Accuracy: Overcomes the limitation of continuous model tuning required by traditional software or simulation methods, offering high confidence in the derived energy efficiency figures.
• Enabling Edge Computing Optimization: The ability to precisely monitor energy usage is critical for developing efficient RISC-V systems for power-constrained environments, such as embedded systems or aerospace applications.
• Foundational Research: Provides a robust physical platform for energy benchmarking, essential for validating future energy-aware optimizations in the burgeoning RISC-V hardware ecosystem.