PERCIVAL: Open-Source Posit RISC-V Core with Quire Capability
Abstract
PERCIVAL is the first open-source, application-level RISC-V core to natively implement the complete posit arithmetic instruction set, critically including the quire fused operations. This implementation integrates the Xposit RISC-V extension into LLVM, bypassing previous limitations of partial hardware support or software emulation. Hardware analysis shows that while the quire introduces overhead, it yields dramatic accuracy improvements, reducing error in general matrix multiplications by up to four orders of magnitude compared to standard single-precision floating-point arithmetic while maintaining competitive performance.
Report
Key Highlights
- First Complete Hardware Integration: PERCIVAL is the first RISC-V core that fully integrates the complete posit instruction set, including quire capabilities, in hardware.
- Open-Source Base: The core is based on the open-source CVA6 RISC-V architecture.
- High Accuracy: The quire accumulator enables significantly more accurate execution of fused operations (like dot products), reducing accuracy error in general matrix multiplications by up to four orders of magnitude compared to IEEE 754 single-precision floats.
- Competitive Performance: Posit execution runs as fast as single-precision floats and exhibits better timing than double-precision floats, proving accuracy gains do not hinder speed.
- Full Toolchain Support: The Xposit RISC-V extension was incorporated into LLVM to enable native posit instruction execution.
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