Abstract

PCG is a novel prefetching-based scheme designed to effectively mitigate conflict-based cache side-channel attacks without incurring significant performance penalties. It achieves robust security by generating noisy, indistinguishable cache access patterns through a combination of adding victim-irrelevant noise and reducing victim-relevant cache occupancy changes. Evaluated using the open-source RISC-V BOOMv3 core, PCG provides superior defense and surprisingly yields an average performance improvement of 1.64% with only 1.26% hardware overhead.

Report

PCG: Mitigating Conflict-based Cache Side-channel Attacks with Prefetching

Key Highlights

• Novel Defense Scheme: PCG introduces a new prefetching-based approach to mitigate conflict-based cache side-channel attacks.
• Dual Mechanism: It operates by simultaneously adding victim-irrelevant cache occupancy changes (noise) and reducing victim-relevant cache occupancy changes (obfuscation) to confuse attackers.
• Superior Security & Performance: The scheme offers robust security, demonstrating superiority over existing noise-only prefetching methods, while achieving an average performance improvement of approximately 1.64% (based on SPEC CPU 2017 benchmarks).
• Low Overhead: PCG requires minimal modification, resulting in only 1.26% overhead on hardware resource consumption.
• Compatibility: The proposed scheme can function independently or seamlessly integrate with most commonly used prefetchers.
• Target Platform: The solution was implemented and evaluated on the open-source RISC-V core BOOMv3, alongside simulation in gem5.

Technical Details

• Core Method: PCG moves beyond simple noise injection (which was experimentally validated as insufficient) to actively disrupt the predictability of the victim's access patterns.
• Implementation Targets: Evaluation was conducted on the widely used architecture simulation framework gem5 and specifically on the high-performance, out-of-order RISC-V BOOMv3 core.
• Performance Metrics: The efficacy and efficiency were measured using the industry standard SPEC CPU 2017 benchmark suite.
• Alternative Comparison: PCG is positioned as a lightweight alternative to traditional heavy mitigation techniques like cache partitioning or set remapping, which typically incur significant performance costs and design complexity.

Implications

• RISC-V Security Enhancement: The successful implementation and evaluation on the open-source BOOMv3 core directly benefits the RISC-V ecosystem by providing a practical, high-efficiency, open-source-compatible solution for a crucial hardware security vulnerability.
• Paradigm Shift in Mitigation: PCG demonstrates that security defenses against side-channel attacks do not inherently require substantial performance trade-offs; in this case, the improved cache usage efficiency (prefetching) contributes to both security and speed.
• Adoption Ease: Due to its compatibility with existing prefetchers and low hardware overhead (1.26%), PCG offers a highly desirable plug-and-play security layer for chip designers and IP vendors utilizing RISC-V or similar architectures.
• Future Resilience: By addressing the limitations of prior noise-injection defenses, PCG establishes a new, higher baseline for robust conflict-based cache side-channel attack protection.