Optimising GPGPU Execution Through Runtime Micro-Architecture Parameter Analysis

Abstract

This work tackles the limitations of proprietary GPGPU analysis tools by leveraging open-source hardware to enable deep micro-architecture parameter analysis. The authors introduce a hardware-aware, runtime mapping technique for OpenCL kernels validated on the open Vortex RISC-V GPGPU platform. This approach utilizes trace observations to optimize hardware resource utilization, achieving superior performance and unlocking the full potential of the open-source GPGPU architecture.

Report

Structured Report: Optimising GPGPU Execution Through Runtime Micro-Architecture Parameter Analysis

Key Highlights

• Overcoming Proprietary Limits: The work directly addresses the limitations imposed by closed-source GPGPU benchmarking tools which typically only provide high-level or statistical data.
• Core Innovation: Development of a hardware-aware, runtime mapping technique specifically for OpenCL kernels.
• Methodology: The technique is rooted in detailed micro-architecture parameter analysis and trace observations, ensuring optimal utilization of underlying hardware resources.
• Target Platform: The methodology was implemented and validated on the open-source Vortex RISC-V GPGPU architecture.
• Performance Gain: The hardware-aware approach demonstrated superior performance and flexibility when compared to traditional, hardware-agnostic mapping methods.

Technical Details

• Architecture Used: Vortex RISC-V GPGPU, an open-source hardware platform.
• Workload Analyzed: General-Purpose computing kernels using the OpenCL framework.
• Optimization Strategy: Runtime mapping driven by explicit analysis of micro-architecture parameters, aiming for maximal utilization of execution units and memory resources.
• Data Source: Trace observations were used to inform and validate the hardware-aware mapping decisions.
• Scope: The research focuses on co-optimizing the entire compute stack: {hardware-mapping-algorithm}.
• Validation: The technique was tested across various architectural GPU configurations using several distinct OpenCL kernels.

Implications

• Enabling RISC-V GPGPU Maturity: This research is crucial for the Vortex GPGPU project and the wider RISC-V GPGPU ecosystem, proving that open hardware allows for unprecedented depth of performance analysis and resulting software optimization.
• Driving High Efficiency: By making optimization decisions at runtime based on real micro-architecture details, the technique allows RISC-V processors to compete in efficiency with highly tuned commercial GPGPUs, particularly in heterogeneous compute environments.
• Open Innovation Catalyst: The success of this approach highlights the key advantage of open-source architectures: researchers can develop highly specialized, performance-enhancing tools and strategies that are impossible to implement on closed proprietary platforms, accelerating the development of the RISC-V ecosystem.
• Tooling Development: Provides a critical blueprint for future runtime systems and compilers targeting RISC-V compute accelerators, emphasizing the necessity of hardware consciousness in scheduling and resource management.