Openchip and NEC Moving Ahead with RISC-V VPUs for Aurora - HPCwire

Abstract

Openchip and NEC are significantly advancing their collaborative efforts to integrate RISC-V Vector Processing Units (VPUs) within the high-performance computing (HPC) environment often associated with the 'Aurora' project. This partnership highlights a growing commercial commitment to utilizing the open RISC-V architecture for highly demanding supercomputing workloads. The move solidifies RISC-V's position as a viable alternative to established proprietary architectures in the critical domain of scientific computing and data analysis.

Report

Key Highlights

• Strategic Partnership: NEC and Openchip are collaborating on hardware development, specifically focusing on RISC-V technology.
• Core Technology: The initiative centers on developing and deploying RISC-V Vector Processing Units (VPUs).
• Target Application: These VPUs are explicitly being designed to support the demanding requirements of the Aurora supercomputing platform/ecosystem.
• Market Validation: This collaboration provides a significant proof point for RISC-V's viability and maturity within the highly competitive high-performance computing sector.

Technical Details

• Architecture Focus: The development emphasizes RISC-V, leveraging its open Instruction Set Architecture (ISA) to create specialized vector units.
• Vector Processing (VPU): VPUs are crucial for HPC, as they enable single instruction, multiple data (SIMD) operations necessary for efficient execution of matrix mathematics, scientific simulations, and large-scale AI/ML workloads.
• Expected Extensions: The development likely involves heavy use of the RISC-V Vector Extension (RVV) specification to achieve the necessary performance density and computational throughput for supercomputing.

Implications

• RISC-V Ecosystem Expansion: This project validates the RISC-V ISA for enterprise-level, performance-critical applications, pushing its boundary far beyond embedded and consumer electronics.
• Competition in HPC: The deployment of RISC-V VPUs directly challenges traditional HPC architectures, including those dominated by Intel (x86) and specialized accelerators from Nvidia and AMD.
• Open Innovation in Supercomputing: NEC and Openchip's commitment reinforces the trend toward open, flexible, and customized hardware solutions, allowing for tailored optimization that proprietary systems often limit.
• Future HPC Roadmap: Success in the Aurora-related environment could set a precedent for future national and international supercomputing projects to consider RISC-V as a foundational compute layer.