IzhiRISC-V -- a RISC-V-based Processor with Custom ISA Extension for Spiking Neuron Networks Processing with Izhikevich Neurons

Abstract

This paper presents IzhiRISC-V, a specialized RISC-V-compliant processor engineered to overcome the inherent inefficiency of running Spiking Neural Networks (SNNs) on general-purpose hardware. The core innovation is a custom Instruction Set Architecture (ISA) extension featuring neuromorphic instructions specifically designed for accelerating spiking neuron updates, particularly those using the Izhikevich model. This approach integrates bespoke hardware expansion into the standard ALU, establishing a foundation for realizing highly energy-efficient, large-scale SNN systems.

Report

Key Highlights

• Introduces IzhiRISC-V, a specialized RISC-V-compliant processor designed for Spiking Neural Networks (SNNs).
• Addresses the performance inefficiency of running SNNs on general-purpose hardware by minimizing the repeated use of basic instructions.
• Features a custom Instruction Set Architecture (ISA) extension dedicated to neuromorphic instructions for spiking neuron updating.
• The specialized instructions are tailored specifically for processing Izhikevich neurons.

Technical Details

• Architecture Base: RISC-V-compliant processor.
• Core Innovation: Custom neuromorphic ISA extension for SNN processing.
• Target Model: Focuses on the efficient calculation and update of Izhikevich neurons.
• Implementation Method: The custom instructions are realized through a bespoke hardware expansion integrated into the existing Arithmetic Logic Unit (ALU).
• Design Goal: This development is positioned as the first step towards realizing a large-scale, high-efficiency SNN system.

Implications

• Validation of RISC-V Extensibility: This work strongly demonstrates the flexibility and power of RISC-V, confirming its utility as an open base architecture suitable for creating highly domain-specific accelerators (in this case, neuromorphic computing) via custom ISA extensions.
• Bridging the Efficiency Gap: Provides a solution to ensure SNNs achieve their potential for high energy efficiency, which is often compromised when simulated on traditional general-purpose processors.
• Advancing Neuromorphic Hardware: By offering a dedicated, programmable hardware solution, IzhiRISC-V contributes to the development of practical, scalable neuromorphic hardware based on open standards.