HULK-V: a Heterogeneous Ultra-low-power Linux capable RISC-V SoC

Abstract

HULK-V is an open-source, ultra-low-power, heterogeneous RISC-V System-on-Chip designed to bring full Linux capability and agility to energy-constrained IoT applications. It combines a 64-bit RISC-V processor with an 8-core Programmable Multi-Core Accelerator (PMCA), achieving up to 112x acceleration for DSP/ML tasks. The SoC leverages HyperRAM IoT DRAM for a fully digital memory hierarchy, successfully doubling energy efficiency compared to traditional LPDDR solutions while maintaining a total power envelope of just 250 mW.

Report

Key Highlights

• Open-Source Heterogeneous SoC (HULK-V): An ultra-low-power RISC-V based System-on-Chip explicitly designed to run a full 64-bit Linux software stack.
• High Efficiency Memory: Employs HyperRAM IoT DRAM (up to 512 MB) to create a lightweight, fully digital memory hierarchy, doubling energy efficiency compared to solutions featuring power-hungry LPDDR memories.
• Performance/Acceleration: Includes an 8-core PMCA capable of accelerating complex DSP and ML tasks by up to 112x over the host processor.
• Power Target: Operates within an ultra-low power envelope of just 250 mW.
• Technology Node: Implemented in Global Foundries 22nm FDX technology.

Technical Details

• Architecture: Features a heterogeneous design coupling a 64-bit RISC-V host processor with an 8-core Programmable Multi-Core Accelerator (PMCA).
• Software Environment: Supports a full 64-bit Linux software stack, including OpenMP for host-to-PMCA offload, facilitating agile development.
• Computational Output: Delivers peak performance of up to 13.8 GOps and achieves energy efficiency of up to 157 GOps/W.
• Memory Advantage: The use of HyperRAM removes the need for expensive and large mixed-signal PHYs typically required by LPDDR interfaces, contributing significantly to both cost reduction and energy savings.

Implications

• Democratizing Linux: HULK-V bridges the gap between high-power Linux-capable systems and low-power microcontrollers, allowing full operating systems to penetrate the ultra-low-power, cost-sensitive IoT edge computing market.
• RISC-V Ecosystem Expansion: This open-source design provides a highly efficient blueprint for future RISC-V systems requiring both OS flexibility and dedicated parallel acceleration for AI/DSP workloads.
• Validation of Alternative DRAM: The successful implementation and performance metrics achieved using HyperRAM demonstrate a viable, energy-efficient memory strategy for RISC-V SoCs in power-constrained environments, challenging the default reliance on LPDDR standards.