Brightening the Optical Flow through Posit Arithmetic

Abstract

This paper investigates the commercial and technical merits of the posit data format as a drop-in replacement for the IEEE 754 floating-point standard, specifically applying it to the Lucas-Kanade (LuKa) optical flow estimation method. Empirical error analysis demonstrated that LuKa using SoftPosit yielded an average error an order of magnitude lower than when using SoftFloat. The study also details the integration of hardware posit adder and multiplier units into a RISC-V open-source platform, offering recommendations for future hardware architecture advancements.

Report

Key Highlights

• Superior Accuracy: Posit arithmetic (SoftPosit) demonstrated an average error that is an order of magnitude lower than traditional IEEE 754 float arithmetic (SoftFloat) when applied to the Lucas-Kanade (LuKa) optical flow estimation method.
• Application Focus: The study specifically targeted optical flow estimation, highlighting a domain where posit arithmetic offers significant practical benefits.
• Hardware Validation: The research includes the successful integration of custom posit hardware units (adder and multiplier) into a RISC-V open-source platform to demonstrate real-world feasibility.
• Future Recommendations: The paper provides analysis and suggestions for the implementation of posit arithmetic units in next-generation computing platforms.

Technical Details

• Arithmetic Formats: Comparison was performed between the Posit data format and the IEEE 754 compliant float format.
• Simulation Tools: SoftPosit and SoftFloat emulators were used to conduct the initial empirical error analysis.
• Target Application: Lucas-Kanade (LuKa) algorithm for optical flow estimation, a common task in computer vision.
• Hardware Integration: A hardware implementation of a posit adder and a posit multiplier were integrated into an open-source RISC-V platform for testing and validation of the arithmetic extensions.

Implications

• Validation of Posits: The findings provide strong empirical evidence supporting the claim that posits offer higher precision and reduced error propagation compared to IEEE 754, making them highly suitable for error-sensitive applications like computer vision.
• RISC-V Ecosystem Expansion: By demonstrating the successful integration of custom posit arithmetic hardware within a RISC-V environment, the paper promotes the use of RISC-V as an ideal architecture for specialized accelerators. This accelerates the adoption of custom floating-point extensions (like posits) crucial for emerging AI/ML and computer vision silicon.
• Future Architectural Shift: The recommendations provided in the paper guide developers in designing future specialized hardware platforms, encouraging the incorporation of posit arithmetic units directly into the instruction set or functional units, potentially leading to performance and energy efficiency improvements alongside increased accuracy.