Basilisk: Achieving Competitive Performance with Open EDA Tools on an Open-Source Linux-Capable RISC-V SoC

Abstract

The paper introduces Basilisk, an optimized application-specific integrated circuit (ASIC) implementation built upon the open-source Iguana RISC-V SoC, demonstrating a highly effective open-source electronic design automation (EDA) flow. By enhancing synthesis tools and optimizing physical design elements like the power grid and cell placement, the project significantly improved the Quality of Results (QoR). Implemented in IHP's 130 nm technology, Basilisk achieved a 2.3x frequency improvement, reaching 77 MHz, and increased core utilization to 55% compared to the baseline open-source design.

Report

Key Highlights

• New Design: Basilisk is introduced as an optimized ASIC implementation based on the end-to-end open-source Iguana System-on-Chip (SoC).
• Performance Leap: The optimized design flow achieved a 2.3x operation frequency improvement compared to the baseline open-source EDA design flow.
• Operating Frequency: Basilisk operates at 77 MHz (51 logic levels) under typical conditions.
• Utilization: Core utilization was improved from 50% in the baseline design to 55% in the Basilisk implementation.
• Methodology: Success was achieved through enhancing synthesis tools, optimizing logic scripts, and collaborative efforts with EDA tool developers.

Technical Details

• Base System: Built upon the open-source Iguana SoC (a Linux-capable RISC-V architecture).
• EDA Enhancements: Improvements focused on synthesis tools and logic optimization scripts to boost Quality of Results (QoR).
• Physical Design: Implementation included an optimized physical design featuring an improved power grid and refined cell placement integration.
• Technology Node: The tapeout-ready version of Basilisk was implemented using IHP's open 130 nm technology.
• Logic Depth: The design achieves 77 MHz with 51 logic levels.

Implications

• Validation of Open EDA: Basilisk serves as a critical proof point that open-source EDA tools, through optimization and collaboration, can achieve competitive performance metrics necessary for research and industry applications, challenging the previous dominance of proprietary tools.
• Accelerating RISC-V Ecosystem: By providing a high-performance, open-source, Linux-capable SoC design flow, Basilisk lowers the barrier to entry for custom hardware development and ASIC tapeouts within the RISC-V community.
• Model for Collaboration: The project exemplifies a successful synergistic effort, showcasing how collaboration between academic researchers and EDA tool developers can rapidly mature open-source hardware development flows.