Arnold: an eFPGA-Augmented RISC-V SoC for Flexible and Low-Power IoT End-Nodes

Abstract

Arnold is an energy-efficient, flexible RISC-V System-on-Chip (SoC) designed for demanding IoT end-nodes, coupling a high-performance MCU with an embedded FPGA (eFPGA) in 22nm GF22FDX technology. The SoC achieves exceptional power efficiency (46.83 uW/MHz) and 600 MOPS performance, offering high adaptability for near-sensor analytics and non-standard peripherals. A key innovation is the use of body-biasing, which drastically cuts eFPGA leakage power by up to 18x, enabling bitstream-retentive sleep power as low as 20.5 uW.

Report

Key Highlights

• eFPGA-Augmented RISC-V SoC: Arnold integrates a fully programmable RISC-V MCU with a state-of-the-art embedded FPGA (eFPGA) specifically for flexible and low-power IoT end-nodes.
• Superior Efficiency: The SoC demonstrates 3.4x better performance and 2.9x better energy efficiency compared to other fabricated heterogeneous re-configurable SoCs in the same class.
• Extreme Low Power Feature: Utilizes body-biasing technology to reduce the leakage power of the eFPGA fabric by up to 18x when operating at 0.5 V.
• Ulta-Low Sleep Power: Achieves a state bitstream-retentive sleep power for the eFPGA fabric of just 20.5 uW.

Technical Details

• Fabrication Technology: Manufactured in 22 nm Globalfoundries GF22FDX (GF22FDX) technology.
• Operating Voltage: Supports a wide range from 0.5 V to 0.8 V.
• Performance Metrics: Achieves 600 MOPS and an energy efficiency metric of 46.83 uW/MHz.
• Flexibility Applications: Designed to handle non-standard interfaces for sensors and accelerators, perform on-the-fly pre-processing of data streams, and accelerate tasks like machine learning, encryption, and near-sensor analytics.
• Power Optimization Method: Implements body-biasing (a unique feature) to manage and minimize leakage current in the highly configurable eFPGA section.

Implications

• Elevating RISC-V in IoT: By successfully integrating highly power-optimized eFPGA fabrics, Arnold significantly enhances the capability of RISC-V MCUs to serve as highly flexible, long-duration IoT end-nodes, bridging the gap between standard CPUs and dedicated hardware accelerators.
• Setting a New Power Standard: The aggressive use of body-biasing to achieve up to an 18x reduction in leakage power sets a new benchmark for power management in reconfigurable fabrics, which is critical for extending the battery life of IoT devices that require dynamic reconfiguration.
• Enabling Edge AI and Analytics: The combination of RISC-V programmability and eFPGA acceleration allows for complex computational tasks, like machine learning and data distillation, to be performed directly at the sensor (near-sensor analytics), reducing bandwidth requirements and latency.