ARISE: Automating RISC-V Instruction Set Extension

ARISE: Automating RISC-V Instruction Set Extension

Abstract

RISC-V's flexibility for custom instruction set extension (ISE) is often hindered by significant manual effort. The tool ARISE automates the generation of optimized RISC-V instructions by analyzing common assembly patterns against defined metrics. This innovation successfully bridges the software/ISA gap, yielding performance gains like a 7.39% reduction in instruction count on the Embench-IoT benchmark.

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ARISE: Automating RISC-V Instruction Set Extension

Key Highlights

  • Automation of ISE: ARISE addresses the major limitation of RISC-V customization—the high manual effort required for Instruction Set Extension (ISE).
  • Optimization Goals: The tool uses an extendable set of metrics focused on optimizing static and dynamic code size, as well as instruction count reduction.
  • Proven Results: Evaluation on the Embench-IoT benchmark showed an average improvement of 7.39% in the number of executed instructions, 3.84% in dynamic code size, and 1.48% in static code size.
  • Input Method: Instruction generation is based on identifying and selecting optimal assembly patterns.

Technical Details

  • Tool Name: ARISE (Automating RISC-V Instruction Set Extension).
  • Description Language Used: The generated instruction set extensions are formally defined using the ISA description language CoreDSL.
  • Integration: ARISE allows seamless embedding into advanced RISC-V toolchains, specifically mentioning integration with the retargeting compiler Seal5 and the instruction set simulator ETISS.
  • Optimization Mechanism: The tool employs an extendable set of metrics to evaluate assembly patterns, driving optimization towards reduced code size and instruction count.

Implications

  • Accelerated Customization: ARISE drastically lowers the barrier to entry for developing application-specific RISC-V cores, making the typically complex and time-consuming process of hardware/software co-design more accessible.
  • Improved Efficiency: By automating the creation of custom instructions tailored to real-world software usage patterns, the resulting specialized ISAs deliver measurable performance and memory footprint improvements for embedded systems.
  • Ecosystem Maturity: The availability of automated ISE tools like ARISE enhances the overall maturity and industrial viability of the RISC-V ecosystem, enabling faster design space exploration necessary for deep domain specialization.
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