Ara2: Exploring Single- and Multi-Core Vector Processing with an Efficient RVV 1.0 Compliant Open-Source Processor

Abstract

Ara2 is presented as the first fully open-source vector processor compliant with the RISC-V V 1.0 frozen ISA, demonstrating state-of-the-art energy efficiency and achieving 95% functional-unit utilization on intensive workloads. Fabricated in 22nm technology, the core reaches 1.35 GHz and delivers 37.8 DP-GFLOPS/W energy efficiency. Crucially, the research validates that clustering multiple narrow vector cores overcomes the scalar core issue-rate bottleneck, yielding 3x better performance and 1.5x improved energy efficiency over wide single-core designs for specific short-vector operations.

Report

Key Highlights

• RVV 1.0 Compliance: Ara2 is the first fully open-source vector processor to support the finalized RISC-V V 1.0 frozen ISA.
• High Efficiency: Achieves a state-of-the-art energy efficiency of 37.8 DP-GFLOPS/W at 0.8V.
• High Utilization: Demonstrates an average functional-unit utilization of 95% on the most computationally intensive kernels.
• Multi-Core Advantage: A cluster of eight 2-lane Ara2 cores provides 3x better performance and 1.5x improved energy efficiency than a single 16-lane Ara2 core when executing 32x32x32 matrix multiplication.

Technical Details

• Technology Implementation: Ara2 was implemented and characterized using 22nm fabrication technology.
• Clock Frequency: Achieves a maximum clock frequency of 1.35 GHz, limited by a critical path of approximately 40 FO4 gates.
• Configuration Range: The design was evaluated across various configurations, ranging from 2 lanes up to 16 lanes per core.
• Performance Bottlenecks: Analysis pinpointed the scalar core issue-rate and memory system as significant bottlenecks limiting overall vector architecture performance, particularly for workloads involving short vectors.
• Architectural Finding: The study proved that utilizing multiple, narrower vector cores (multi-core clustering) is an effective strategy to mitigate the scalar core issue-rate bound, maximizing throughput for small-to-medium data-parallel kernels.

Implications

• Accelerating RISC-V Ecosystem: As the first fully open-source RVV 1.0 compliant processor, Ara2 provides a foundational reference implementation, significantly lowering the barrier to entry for research, education, and commercial adoption of the RISC-V Vector extension.
• Architectural Guidance for HPC/AI: The findings provide crucial data regarding the performance trade-offs between wide single-core vector engines and clustered multi-core configurations. This suggests future high-performance computing (HPC) and AI accelerators should favor distributed, multi-core vector processing for optimal energy efficiency and short-vector throughput.
• PPA Benchmark: Ara2 sets a new benchmark for power, performance, and area (PPA) efficiency in the open-source vector processing domain, validated by its exceptional GFLOPS/W metric in 22nm technology.