Allwinner V861 dual-core 64-bit RISC-V AI Camera SiP features 128MB DDR3L, 4K H.265/H.264 video encoder - CNX Software

Allwinner V861 dual-core 64-bit RISC-V AI Camera SiP features 128MB DDR3L, 4K H.265/H.264 video encoder - CNX Software

Abstract

Allwinner has introduced the V861, a new dual-core 64-bit RISC-V System-in-Package (SiP) specifically designed for advanced AI camera applications. This chip integrates 128MB of DDR3L memory directly, significantly simplifying hardware design and reducing bill-of-materials costs for manufacturers. The V861 is capable of robust multimedia processing, featuring a high-performance video encoder that supports 4K resolution using both H.265 and H.264 codecs.

Report

Allwinner V861 RISC-V AI Camera SiP Analysis

Key Highlights

  • Product Focus: The Allwinner V861 is a System-in-Package (SiP) explicitly tailored for the demanding AI Camera market.
  • Core Architecture: Utilizes a dual-core, 64-bit RISC-V processor architecture.
  • Integration Advantage: Features tightly integrated 128MB of DDR3L memory, which streamlines system design and reduces external component requirements.
  • Video Performance: Supports high-definition multimedia tasks, specifically 4K (Ultra HD) video encoding.

Technical Details

  • Processor: Dual-core 64-bit RISC-V CPU.
  • Memory: On-package 128MB DDR3L RAM, leveraging the SiP design for improved signal integrity and reduced PCB complexity.
  • Encoding: Includes a dedicated video encoder unit supporting industry-standard H.265 and H.264 formats at 4K resolution.
  • Application: Classified as an 'AI Camera SiP,' indicating the inclusion of dedicated acceleration or instruction sets for neural network processing necessary for modern computer vision tasks.

Implications

  • RISC-V Maturity: The launch validates RISC-V's increasing maturity and ability to handle complex, high-bandwidth applications like 4K video encoding and AI processing, moving beyond basic microcontrollers.
  • Embedded Market Penetration: Allwinner's adoption of RISC-V for a flagship surveillance/smart camera product signals strong commercial confidence in the open standard architecture, intensifying competition with incumbent ARM solutions in the IoT and embedded video sectors.
  • Supply Chain Efficiency: The SiP approach (integrating DRAM) offers manufacturers a more consolidated, smaller footprint solution, potentially lowering manufacturing costs and accelerating the development cycle for compact camera products.
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