AES-RV: Hardware-Efficient RISC-V Accelerator with Low-Latency AES Instruction Extension for IoT Security

Abstract

The AES-RV paper presents a hardware-efficient RISC-V accelerator featuring custom, low-latency AES instruction extensions optimized for real-time cryptographic processing in IoT systems. The architecture integrates high-bandwidth buffers, a specialized AES unit, and a pipelined system utilizing ping-pong memory transfer for continuous data flow across all AES modes. Implemented on an FPGA, AES-RV achieves a speedup of up to 255.97 times and 453.04 times higher energy efficiency compared to conventional CPU/GPU platforms, demonstrating superior area efficiency against existing accelerators.

Report

Key Highlights

• Core Innovation: AES-RV, a hardware-efficient RISC-V accelerator featuring custom low-latency AES instruction extensions.
• Performance Benchmark: Achieves up to 255.97 times speedup compared to baseline and conventional CPU/GPU platforms.
• Energy Efficiency: Demonstrates up to 453.04 times higher energy efficiency compared to traditional platforms.
• Versatility: Optimized for real-time processing and supports all AES modes and key sizes.
• Efficiency Leader: Exhibits superior throughput and area efficiency against state-of-the-art AES accelerators.

Technical Details

• Architecture: Customized RISC-V core integrating a specialized AES unit.
• Key Innovations: The system relies on three integrated architectural innovations:
  1. High-bandwidth internal buffers for continuous data processing.
  2. A specialized AES unit utilizing custom low-latency instructions.
  3. A pipelined system supported by a ping-pong memory transfer mechanism.
• Purpose: The design targets limitations in performance, energy efficiency, and flexibility found in existing AES hardware accelerators.
• Implementation: The AES-RV accelerator was implemented on the Xilinx ZCU102 SoC FPGA.

Implications

• RISC-V Cryptography Ecosystem: This work validates the effectiveness of customizing the RISC-V Instruction Set Architecture (ISA) with domain-specific extensions (like AES) to deliver competitive, high-performance cryptography solutions for embedded systems.
• IoT Security: By offering extremely high energy efficiency and low latency, AES-RV provides an ideal platform for secure, battery-powered embedded devices and IoT platforms requiring real-time data encryption.
• Market Competitiveness: AES-RV raises the bar for hardware-based AES acceleration, positioning custom RISC-V solutions as strong candidates that can outperform existing conventional CPU/GPU platforms and dedicated accelerators in terms of speed, power consumption, and area footprint.