A Survey on Deep Learning Hardware Accelerators for Heterogeneous HPC Platforms

Abstract

This comprehensive survey categorizes the recent evolution of Deep Learning (DL) hardware accelerators essential for fulfilling the demanding performance requirements of High-Performance Computing (HPC) applications. It thoroughly reviews established platforms, including GPUs, TPUs, FPGAs, and ASICs, while dedicating significant focus to specialized cutting-edge solutions. Key emerging technologies analyzed include open hardware RISC-V accelerators, Processor-In-Memory (PIM) structures leveraging non-volatile memories, Neuromorphic units, and future quantum/photonic acceleration paradigms.

Report

Key Highlights

• Comprehensive Scope: The survey provides a deep classification of modern DL hardware accelerators, ranging from established GPU and TPU architectures to specialized silicon.
• HPC Context: The primary focus is on how these accelerators meet the high-performance demands necessary for diverse HPC applications (e.g., vision, classification, speech recognition).
• Open Hardware Inclusion: It specifically analyzes and categorizes open hardware RISC-V-based accelerators alongside proprietary solutions like NPUs.
• Emerging Technology Focus: Significant attention is given to advanced computing paradigms, including In-Memory Computing (IMC) using RRAM/PCM, 3D-stacked PIM, and Neuromorphic Processing Units.
• Future Trends: The survey also provides forward-looking insights into Multi-Chip Modules (MCMs), quantum-based, and photonics accelerators.

Technical Details

• Established Architectures: GPU (parallel processing), TPU (systolic array optimization), FPGA (reconfigurable logic), and custom ASIC/NPU solutions.
• Open Architecture: Explicit classification and analysis of open hardware RISC-V-based accelerators, emphasizing their role in democratizing HPC hardware design.
• Memory-Centric Computing: Exploration of 3D-stacked Processor-In-Memory (PIM) architectures designed to mitigate the memory wall bottleneck.
• Non-Volatile Memory (NVM) Utilization: Details accelerators leveraging Resistive RAM (RRAM) and Phase Change Memories (PCM) for highly efficient in-memory computing (IMC).
• Alternative Paradigms: Examination of biological inspired Neuromorphic Processing Units (NPUs) and heterogeneous integration via Multi-Chip Modules (MCMs).

Implications

This survey confirms the maturity and relevance of the RISC-V ecosystem within the high-performance computing landscape.

• RISC-V Validation: Explicit inclusion of RISC-V based accelerators validates the ISA as a serious, competitive foundation for high-performance DL specialization, grouping it with industry standard technologies (GPU/TPU).
• Design Guidance for Open Hardware: By categorizing RISC-V solutions alongside emerging memory paradigms (PIM, IMC), the survey guides the RISC-V community toward critical areas for future development—specifically, integrating the open ISA with cutting-edge 3D stacking and non-volatile memory techniques to achieve energy efficiency parity with specialized ASICs.
• Heterogeneous System Importance: The focus on 'Heterogeneous HPC Platforms' underscores that future high-performance systems will rely heavily on specialized accelerators integrated alongside general-purpose cores, ensuring that RISC-V architectures must prioritize seamless integration and software stack maturity to compete with established proprietary accelerators.