A Reconfigurable Approximate Computing RISC-V Platform for Fault-Tolerant Applications

A Reconfigurable Approximate Computing RISC-V Platform for Fault-Tolerant Applications

Abstract

This paper presents "phoeniX," a novel reconfigurable embedded platform built upon the standard RISC-V ISA, designed to maximize energy efficiency through approximate computing while maintaining application-level accuracy. The platform uniquely allows the integration of diverse approximate circuits at the core level without requiring modifications to the core's control logic. Implemented as an optimized 3-stage pipelined RV32I(E)M architecture in 45nm CMOS, the core achieves remarkable metrics, including 1.89 DMIPS/MHz and an energy efficiency of 7.85 pJ per operation.

Report

Key Highlights

  • Novel Platform: Introduction of "phoeniX," a highly reconfigurable embedded platform leveraging Approximate Computing (AC).
  • RISC-V Standard: The platform utilizes the standard RISC-V Instruction Set Architecture (ISA).
  • Decoupled AC Integration: Enables the seamless integration of approximate circuits with varying structures, accuracies, and timings directly into the core without requiring any changes to the core's underlying control logic.
  • Configurable Trade-offs: Features novel control mechanisms allowing dynamic tuning of trade-offs between computational accuracy and energy consumption based on specific application needs.
  • Target Applications: Demonstrated effectiveness through experiments involving image processing and the Dhrystone benchmark.

Technical Details

Specification Value
Architecture Optimized 3-stage pipelined RV32I(E)M
Fabrication Technology 45nm CMOS
Core Area (Original Engine) 0.024 mm²
Operating Frequency 620 MHz
Operating Voltage 1.1 V
Average Power Consumption 4.23 mW
Energy Efficiency 7.85 pJ per operation
Performance (Dhrystone) 1.89 DMIPS/MHz (CPI of 1.13)

Implications

  • Advancing Energy Efficiency: This research significantly pushes the boundary of energy-efficient embedded systems by providing a standardized, yet flexible, mechanism for incorporating approximate computing techniques directly into the RISC-V core.
  • Modular Design for RISC-V: The ability to integrate AC circuits without altering control logic establishes a highly modular design methodology. This simplifies the development and adoption of heterogeneous and approximate cores within the RISC-V ecosystem.
  • Enabling Fault Tolerance: By focusing on AC, which naturally tolerates minor errors for significant efficiency gains, the platform is ideally suited for critical fault-tolerant applications (e.g., edge AI, sensors) where high reliability and low power consumption are paramount.
  • Competitive Performance: The reported metrics (1.89 DMIPS/MHz and extremely low energy consumption) position this architecture as a strong candidate for highly resource-constrained computing environments.
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