A portable and Linux capable RISC-V computer system in Verilog HDL

Abstract

This paper introduces a novel, portable RISC-V computer system implemented entirely in Verilog HDL, explicitly designed to boot the Linux operating system. Addressing the scarcity of public, Linux-capable RISC-V systems, the proposed design is highly optimized for FPGAs by minimizing hardware resource usage. This resource-efficient architecture is suitable for low-cost FPGAs and offers high customizability, allowing for easy integration of accelerators.

Report

Key Highlights

• Presents a fully portable and Linux capable RISC-V computer system implementation.
• The entire system is described using Verilog HDL, maximizing cross-platform portability across different FPGAs.
• The design is optimized for resource minimization, allowing it to be implemented on low-cost FPGAs.
• The architecture is designed for easy customization, specifically allowing users to introduce accelerators into the system.

Technical Details

• ISA: RISC-V (open and royalty-free instruction set architecture).
• Implementation Language: Verilog HDL.
• Target Platform: FPGAs.
• Capability: Capable of booting and running the Linux operating system.
• Optimization Goal: Implementation with fewer hardware resources compared to existing public RISC-V systems.

Implications

This research fills a gap in the RISC-V ecosystem by providing a publicly available, validated platform that can run a standard OS like Linux while maintaining portability across various FPGA hardware. The low resource footprint democratizes RISC-V development, making complex system experimentation accessible on inexpensive FPGA boards for students, hobbyists, and researchers with limited budgets. Its modular design and Verilog implementation significantly lower the barrier to entry for customizing the SoC, encouraging further development of specialized hardware and accelerators for the RISC-V architecture.